| Message ID | 20191023173154.30051-25-marcandre.lureau@redhat.com |
|---|---|
| State | New |
| Headers | show |
| Series | Clean-ups: qom-ify serial and remove QDEV_PROP_PTR | expand |
Hi Marc-André, Le 10/23/19 à 7:31 PM, Marc-André Lureau a écrit : > "set_pin_in" property is used to define a callback mechanism where the > device says "call the callback function, passing it an opaque cookie > and a 32-bit value". We already have a generic mechanism for doing > that, which is the qemu_irq. So we should just use that. > > Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> > --- > hw/intc/grlib_irqmp.c | 35 ++++------------------------------- > hw/sparc/leon3.c | 9 +++++---- > target/sparc/cpu.h | 1 + > 3 files changed, 10 insertions(+), 35 deletions(-) > > diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c > index bc78e1a14f..794c643af2 100644 > --- a/hw/intc/grlib_irqmp.c > +++ b/hw/intc/grlib_irqmp.c > @@ -25,6 +25,7 @@ > */ > > #include "qemu/osdep.h" > +#include "hw/irq.h" > #include "hw/sysbus.h" > #include "cpu.h" > > @@ -58,10 +59,8 @@ typedef struct IRQMP { > > MemoryRegion iomem; > > - void *set_pil_in; > - void *set_pil_in_opaque; > - > IRQMPState *state; > + qemu_irq irq; > } IRQMP; > > struct IRQMPState { > @@ -82,7 +81,6 @@ static void grlib_irqmp_check_irqs(IRQMPState *state) > uint32_t pend = 0; > uint32_t level0 = 0; > uint32_t level1 = 0; > - set_pil_in_fn set_pil_in; > > assert(state != NULL); > assert(state->parent != NULL); > @@ -97,14 +95,8 @@ static void grlib_irqmp_check_irqs(IRQMPState *state) > trace_grlib_irqmp_check_irqs(state->pending, state->force[0], > state->mask[0], level1, level0); > > - set_pil_in = (set_pil_in_fn)state->parent->set_pil_in; > - > /* Trigger level1 interrupt first and level0 if there is no level1 */ > - if (level1 != 0) { > - set_pil_in(state->parent->set_pil_in_opaque, level1); > - } else { > - set_pil_in(state->parent->set_pil_in_opaque, level0); > - } > + qemu_set_irq(state->parent->irq, level1 ?: level0); > } > > static void grlib_irqmp_ack_mask(IRQMPState *state, uint32_t mask) > @@ -335,6 +327,7 @@ static void grlib_irqmp_init(Object *obj) > IRQMP *irqmp = GRLIB_IRQMP(obj); > SysBusDevice *dev = SYS_BUS_DEVICE(obj); > > + qdev_init_gpio_out_named(DEVICE(obj), &irqmp->irq, "grlib-irq", 1); > memory_region_init_io(&irqmp->iomem, obj, &grlib_irqmp_ops, irqmp, > "irqmp", IRQMP_REG_SIZE); > > @@ -343,31 +336,11 @@ static void grlib_irqmp_init(Object *obj) > sysbus_init_mmio(dev, &irqmp->iomem); > } > > -static void grlib_irqmp_realize(DeviceState *dev, Error **errp) > -{ > - IRQMP *irqmp = GRLIB_IRQMP(dev); > - > - /* Check parameters */ > - if (irqmp->set_pil_in == NULL) { > - error_setg(errp, "set_pil_in cannot be NULL."); > - } > -} > - > -static Property grlib_irqmp_properties[] = { > - DEFINE_PROP_PTR("set_pil_in", IRQMP, set_pil_in), > - DEFINE_PROP_PTR("set_pil_in_opaque", IRQMP, set_pil_in_opaque), > - DEFINE_PROP_END_OF_LIST(), > -}; > - > static void grlib_irqmp_class_init(ObjectClass *klass, void *data) > { > DeviceClass *dc = DEVICE_CLASS(klass); > > dc->reset = grlib_irqmp_reset; > - dc->props = grlib_irqmp_properties; > - /* Reason: pointer properties "set_pil_in", "set_pil_in_opaque" */ > - dc->user_creatable = false; Was confused first, since we don't want this device to be user creatable. But I think that SysBusDevice has that set to "false" anyway so it's all right. > - dc->realize = grlib_irqmp_realize; > } > > static const TypeInfo grlib_irqmp_info = { > diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c > index c5f1b1ee72..6db6ea9b5c 100644 > --- a/hw/sparc/leon3.c > +++ b/hw/sparc/leon3.c > @@ -143,9 +143,10 @@ void leon3_irq_ack(void *irq_manager, int intno) > grlib_irqmp_ack((DeviceState *)irq_manager, intno); > } > > -static void leon3_set_pil_in(void *opaque, uint32_t pil_in) > +static void leon3_set_pil_in(void *opaque, int n, int level) > { > - CPUSPARCState *env = (CPUSPARCState *)opaque; > + CPUSPARCState *env = opaque; > + uint32_t pil_in = level; > CPUState *cs; > > assert(env != NULL); > @@ -225,8 +226,8 @@ static void leon3_generic_hw_init(MachineState *machine) > > /* Allocate IRQ manager */ > dev = qdev_create(NULL, TYPE_GRLIB_IRQMP); > - qdev_prop_set_ptr(dev, "set_pil_in", leon3_set_pil_in); > - qdev_prop_set_ptr(dev, "set_pil_in_opaque", env); > + env->pil_irq = qemu_allocate_irq(leon3_set_pil_in, env, 0); > + qdev_connect_gpio_out_named(dev, "grlib-irq", 0, env->pil_irq); > qdev_init_nofail(dev); > sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET); > env->irq_manager = dev; > diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h > index 778aa8e073..709215f8c1 100644 > --- a/target/sparc/cpu.h > +++ b/target/sparc/cpu.h > @@ -508,6 +508,7 @@ struct CPUSPARCState { > #endif > sparc_def_t def; > > + qemu_irq pil_irq; > void *irq_manager; > void (*qemu_irq_ack)(CPUSPARCState *env, void *irq_manager, int intno); > > Seems ok to me. Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com> Thanks, Fred
On Wed, 23 Oct 2019 at 18:34, Marc-André Lureau <marcandre.lureau@redhat.com> wrote: > > "set_pin_in" property is used to define a callback mechanism where the > device says "call the callback function, passing it an opaque cookie > and a 32-bit value". We already have a generic mechanism for doing > that, which is the qemu_irq. So we should just use that. > > Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> > --- This is probably a good place to put a comment: /* * This device assumes that the incoming 'level' value on the * qemu_irq is the interrupt number, not just a simple 0/1 level. */ > -static void leon3_set_pil_in(void *opaque, uint32_t pil_in) > +static void leon3_set_pil_in(void *opaque, int n, int level) > { > - CPUSPARCState *env = (CPUSPARCState *)opaque; > + CPUSPARCState *env = opaque; > + uint32_t pil_in = level; > CPUState *cs; > > assert(env != NULL); Otherwise Reviewed-by: Peter Maydell <peter.maydell@linaro.org> thanks -- PMM
diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index bc78e1a14f..794c643af2 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc/grlib_irqmp.c @@ -25,6 +25,7 @@ */ #include "qemu/osdep.h" +#include "hw/irq.h" #include "hw/sysbus.h" #include "cpu.h" @@ -58,10 +59,8 @@ typedef struct IRQMP { MemoryRegion iomem; - void *set_pil_in; - void *set_pil_in_opaque; - IRQMPState *state; + qemu_irq irq; } IRQMP; struct IRQMPState { @@ -82,7 +81,6 @@ static void grlib_irqmp_check_irqs(IRQMPState *state) uint32_t pend = 0; uint32_t level0 = 0; uint32_t level1 = 0; - set_pil_in_fn set_pil_in; assert(state != NULL); assert(state->parent != NULL); @@ -97,14 +95,8 @@ static void grlib_irqmp_check_irqs(IRQMPState *state) trace_grlib_irqmp_check_irqs(state->pending, state->force[0], state->mask[0], level1, level0); - set_pil_in = (set_pil_in_fn)state->parent->set_pil_in; - /* Trigger level1 interrupt first and level0 if there is no level1 */ - if (level1 != 0) { - set_pil_in(state->parent->set_pil_in_opaque, level1); - } else { - set_pil_in(state->parent->set_pil_in_opaque, level0); - } + qemu_set_irq(state->parent->irq, level1 ?: level0); } static void grlib_irqmp_ack_mask(IRQMPState *state, uint32_t mask) @@ -335,6 +327,7 @@ static void grlib_irqmp_init(Object *obj) IRQMP *irqmp = GRLIB_IRQMP(obj); SysBusDevice *dev = SYS_BUS_DEVICE(obj); + qdev_init_gpio_out_named(DEVICE(obj), &irqmp->irq, "grlib-irq", 1); memory_region_init_io(&irqmp->iomem, obj, &grlib_irqmp_ops, irqmp, "irqmp", IRQMP_REG_SIZE); @@ -343,31 +336,11 @@ static void grlib_irqmp_init(Object *obj) sysbus_init_mmio(dev, &irqmp->iomem); } -static void grlib_irqmp_realize(DeviceState *dev, Error **errp) -{ - IRQMP *irqmp = GRLIB_IRQMP(dev); - - /* Check parameters */ - if (irqmp->set_pil_in == NULL) { - error_setg(errp, "set_pil_in cannot be NULL."); - } -} - -static Property grlib_irqmp_properties[] = { - DEFINE_PROP_PTR("set_pil_in", IRQMP, set_pil_in), - DEFINE_PROP_PTR("set_pil_in_opaque", IRQMP, set_pil_in_opaque), - DEFINE_PROP_END_OF_LIST(), -}; - static void grlib_irqmp_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->reset = grlib_irqmp_reset; - dc->props = grlib_irqmp_properties; - /* Reason: pointer properties "set_pil_in", "set_pil_in_opaque" */ - dc->user_creatable = false; - dc->realize = grlib_irqmp_realize; } static const TypeInfo grlib_irqmp_info = { diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index c5f1b1ee72..6db6ea9b5c 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -143,9 +143,10 @@ void leon3_irq_ack(void *irq_manager, int intno) grlib_irqmp_ack((DeviceState *)irq_manager, intno); } -static void leon3_set_pil_in(void *opaque, uint32_t pil_in) +static void leon3_set_pil_in(void *opaque, int n, int level) { - CPUSPARCState *env = (CPUSPARCState *)opaque; + CPUSPARCState *env = opaque; + uint32_t pil_in = level; CPUState *cs; assert(env != NULL); @@ -225,8 +226,8 @@ static void leon3_generic_hw_init(MachineState *machine) /* Allocate IRQ manager */ dev = qdev_create(NULL, TYPE_GRLIB_IRQMP); - qdev_prop_set_ptr(dev, "set_pil_in", leon3_set_pil_in); - qdev_prop_set_ptr(dev, "set_pil_in_opaque", env); + env->pil_irq = qemu_allocate_irq(leon3_set_pil_in, env, 0); + qdev_connect_gpio_out_named(dev, "grlib-irq", 0, env->pil_irq); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET); env->irq_manager = dev; diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 778aa8e073..709215f8c1 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -508,6 +508,7 @@ struct CPUSPARCState { #endif sparc_def_t def; + qemu_irq pil_irq; void *irq_manager; void (*qemu_irq_ack)(CPUSPARCState *env, void *irq_manager, int intno);
"set_pin_in" property is used to define a callback mechanism where the device says "call the callback function, passing it an opaque cookie and a 32-bit value". We already have a generic mechanism for doing that, which is the qemu_irq. So we should just use that. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> --- hw/intc/grlib_irqmp.c | 35 ++++------------------------------- hw/sparc/leon3.c | 9 +++++---- target/sparc/cpu.h | 1 + 3 files changed, 10 insertions(+), 35 deletions(-)