[v4,4/7] dt-bindings: sram: Merge Renesas SRAM bindings into generic
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Message ID 20191021161351.20789-4-krzk@kernel.org
State Accepted
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  • [v4,1/7] dt-bindings: sram: Convert SRAM bindings to json-schema
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Context Check Description
robh/checkpatch warning "total: 0 errors, 2 warnings, 24 lines checked"

Commit Message

Krzysztof Kozlowski Oct. 21, 2019, 4:13 p.m. UTC
The Renesas SRAM bindings list only compatible so integrate them into
generic SRAM bindings schema.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

---

Changes since v3:
1. New patch
---
 .../bindings/sram/renesas,smp-sram.txt        | 27 -------------------
 .../devicetree/bindings/sram/sram.yaml        | 15 +++++++++++
 2 files changed, 15 insertions(+), 27 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/sram/renesas,smp-sram.txt

Comments

Geert Uytterhoeven Nov. 1, 2019, 10:08 a.m. UTC | #1
Hi Krzysztof,

On Mon, Oct 21, 2019 at 6:15 PM Krzysztof Kozlowski <krzk@kernel.org> wrote:
> The Renesas SRAM bindings list only compatible so integrate them into
> generic SRAM bindings schema.
>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

Thanks for your patch, whcih is now commit 0759b09eadd0d9a1 ("dt-bindings:
sram: Merge Renesas SRAM bindings into generic") in Rob's for-next branch.

> --- a/Documentation/devicetree/bindings/sram/renesas,smp-sram.txt
> +++ /dev/null
> @@ -1,27 +0,0 @@
> -* Renesas SMP SRAM
> -
> -Renesas R-Car Gen2 and RZ/G1 SoCs need a small piece of SRAM for the jump stub
> -for secondary CPU bringup and CPU hotplug.
> -This memory is reserved by adding a child node to a "mmio-sram" node, cfr.
> -Documentation/devicetree/bindings/sram/sram.txt.
> -
> -Required child node properties:
> -  - compatible: Must be "renesas,smp-sram",
> -  - reg: Address and length of the reserved SRAM.
> -    The full physical (bus) address must be aligned to a 256 KiB boundary.
> -
> -
> -Example:
> -
> -       icram1: sram@e63c0000 {
> -               compatible = "mmio-sram";
> -               reg = <0 0xe63c0000 0 0x1000>;
> -               #address-cells = <1>;
> -               #size-cells = <1>;
> -               ranges = <0 0 0xe63c0000 0x1000>;
> -
> -               smp-sram@0 {
> -                       compatible = "renesas,smp-sram";
> -                       reg = <0 0x10>;
> -               };

> --- a/Documentation/devicetree/bindings/sram/sram.yaml
> +++ b/Documentation/devicetree/bindings/sram/sram.yaml

> @@ -186,3 +187,17 @@ examples:
>              reg = <0x1ff80 0x8>;
>          };
>      };
> +
> +  - |
> +    sram@e63c0000 {
> +        compatible = "mmio-sram";
> +        reg = <0xe63c0000 0x1000>;

Is there any specific reason you converted the example from 64-bit to
32-bit addressing?
All Renesas SoCs using this have #address-cells and #size-cells = <2>.

Thanks!

> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        ranges = <0 0xe63c0000 0x1000>;
> +
> +        smp-sram@0 {
> +            compatible = "renesas,smp-sram";
> +            reg = <0 0x10>;
> +        };
> +    };

Gr{oetje,eeting}s,

                        Geert
Krzysztof Kozlowski Nov. 1, 2019, 10:53 a.m. UTC | #2
On Fri, 1 Nov 2019 at 11:08, Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Krzysztof,
>
> On Mon, Oct 21, 2019 at 6:15 PM Krzysztof Kozlowski <krzk@kernel.org> wrote:
> > The Renesas SRAM bindings list only compatible so integrate them into
> > generic SRAM bindings schema.
> >
> > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
>
> Thanks for your patch, whcih is now commit 0759b09eadd0d9a1 ("dt-bindings:
> sram: Merge Renesas SRAM bindings into generic") in Rob's for-next branch.
>
> > --- a/Documentation/devicetree/bindings/sram/renesas,smp-sram.txt
> > +++ /dev/null
> > @@ -1,27 +0,0 @@
> > -* Renesas SMP SRAM
> > -
> > -Renesas R-Car Gen2 and RZ/G1 SoCs need a small piece of SRAM for the jump stub
> > -for secondary CPU bringup and CPU hotplug.
> > -This memory is reserved by adding a child node to a "mmio-sram" node, cfr.
> > -Documentation/devicetree/bindings/sram/sram.txt.
> > -
> > -Required child node properties:
> > -  - compatible: Must be "renesas,smp-sram",
> > -  - reg: Address and length of the reserved SRAM.
> > -    The full physical (bus) address must be aligned to a 256 KiB boundary.
> > -
> > -
> > -Example:
> > -
> > -       icram1: sram@e63c0000 {
> > -               compatible = "mmio-sram";
> > -               reg = <0 0xe63c0000 0 0x1000>;
> > -               #address-cells = <1>;
> > -               #size-cells = <1>;
> > -               ranges = <0 0 0xe63c0000 0x1000>;
> > -
> > -               smp-sram@0 {
> > -                       compatible = "renesas,smp-sram";
> > -                       reg = <0 0x10>;
> > -               };
>
> > --- a/Documentation/devicetree/bindings/sram/sram.yaml
> > +++ b/Documentation/devicetree/bindings/sram/sram.yaml
>
> > @@ -186,3 +187,17 @@ examples:
> >              reg = <0x1ff80 0x8>;
> >          };
> >      };
> > +
> > +  - |
> > +    sram@e63c0000 {
> > +        compatible = "mmio-sram";
> > +        reg = <0xe63c0000 0x1000>;
>
> Is there any specific reason you converted the example from 64-bit to
> 32-bit addressing?
> All Renesas SoCs using this have #address-cells and #size-cells = <2>.

I should mention it in commit msg. The reason is because examples are
compiled inside a {} with address/size cells of 1. Instead of
conversion maybe it would be reasonable to put it inside additional
node adjusting the address/size cells.

Best regards,
Krzysztof
Geert Uytterhoeven Nov. 1, 2019, 11:01 a.m. UTC | #3
Hi Krzysztof,

On Fri, Nov 1, 2019 at 11:54 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
> On Fri, 1 Nov 2019 at 11:08, Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > On Mon, Oct 21, 2019 at 6:15 PM Krzysztof Kozlowski <krzk@kernel.org> wrote:
> > > The Renesas SRAM bindings list only compatible so integrate them into
> > > generic SRAM bindings schema.
> > >
> > > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> >
> > Thanks for your patch, whcih is now commit 0759b09eadd0d9a1 ("dt-bindings:
> > sram: Merge Renesas SRAM bindings into generic") in Rob's for-next branch.
> >
> > > --- a/Documentation/devicetree/bindings/sram/renesas,smp-sram.txt
> > > +++ /dev/null
> > > @@ -1,27 +0,0 @@
> > > -* Renesas SMP SRAM
> > > -
> > > -Renesas R-Car Gen2 and RZ/G1 SoCs need a small piece of SRAM for the jump stub
> > > -for secondary CPU bringup and CPU hotplug.
> > > -This memory is reserved by adding a child node to a "mmio-sram" node, cfr.
> > > -Documentation/devicetree/bindings/sram/sram.txt.
> > > -
> > > -Required child node properties:
> > > -  - compatible: Must be "renesas,smp-sram",
> > > -  - reg: Address and length of the reserved SRAM.
> > > -    The full physical (bus) address must be aligned to a 256 KiB boundary.
> > > -
> > > -
> > > -Example:
> > > -
> > > -       icram1: sram@e63c0000 {
> > > -               compatible = "mmio-sram";
> > > -               reg = <0 0xe63c0000 0 0x1000>;
> > > -               #address-cells = <1>;
> > > -               #size-cells = <1>;
> > > -               ranges = <0 0 0xe63c0000 0x1000>;
> > > -
> > > -               smp-sram@0 {
> > > -                       compatible = "renesas,smp-sram";
> > > -                       reg = <0 0x10>;
> > > -               };
> >
> > > --- a/Documentation/devicetree/bindings/sram/sram.yaml
> > > +++ b/Documentation/devicetree/bindings/sram/sram.yaml
> >
> > > @@ -186,3 +187,17 @@ examples:
> > >              reg = <0x1ff80 0x8>;
> > >          };
> > >      };
> > > +
> > > +  - |
> > > +    sram@e63c0000 {
> > > +        compatible = "mmio-sram";
> > > +        reg = <0xe63c0000 0x1000>;
> >
> > Is there any specific reason you converted the example from 64-bit to
> > 32-bit addressing?
> > All Renesas SoCs using this have #address-cells and #size-cells = <2>.
>
> I should mention it in commit msg. The reason is because examples are
> compiled inside a {} with address/size cells of 1. Instead of

Thanks, that's what I was already afraid of...

> conversion maybe it would be reasonable to put it inside additional
> node adjusting the address/size cells.

I think it's fine to leave it as-as, though.  If we ever get to DT-ize
secondary CPU startup on EMMA Mobile EV2 or SH-Mobile AG5, we'll have
users without LPAE ;-)

Gr{oetje,eeting}s,

                        Geert

Patch
diff mbox series

diff --git a/Documentation/devicetree/bindings/sram/renesas,smp-sram.txt b/Documentation/devicetree/bindings/sram/renesas,smp-sram.txt
deleted file mode 100644
index 712d05e3e15e..000000000000
--- a/Documentation/devicetree/bindings/sram/renesas,smp-sram.txt
+++ /dev/null
@@ -1,27 +0,0 @@ 
-* Renesas SMP SRAM
-
-Renesas R-Car Gen2 and RZ/G1 SoCs need a small piece of SRAM for the jump stub
-for secondary CPU bringup and CPU hotplug.
-This memory is reserved by adding a child node to a "mmio-sram" node, cfr.
-Documentation/devicetree/bindings/sram/sram.txt.
-
-Required child node properties:
-  - compatible: Must be "renesas,smp-sram",
-  - reg: Address and length of the reserved SRAM.
-    The full physical (bus) address must be aligned to a 256 KiB boundary.
-
-
-Example:
-
-	icram1:	sram@e63c0000 {
-		compatible = "mmio-sram";
-		reg = <0 0xe63c0000 0 0x1000>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges = <0 0 0xe63c0000 0x1000>;
-
-		smp-sram@0 {
-			compatible = "renesas,smp-sram";
-			reg = <0 0x10>;
-		};
-	};
diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml
index a78da7a686d0..b92e3e10fbfc 100644
--- a/Documentation/devicetree/bindings/sram/sram.yaml
+++ b/Documentation/devicetree/bindings/sram/sram.yaml
@@ -67,6 +67,7 @@  patternProperties:
         enum:
           - amlogic,meson8-smp-sram
           - amlogic,meson8b-smp-sram
+          - renesas,smp-sram
           - samsung,exynos4210-sysram
           - samsung,exynos4210-sysram-ns
 
@@ -186,3 +187,17 @@  examples:
             reg = <0x1ff80 0x8>;
         };
     };
+
+  - |
+    sram@e63c0000 {
+        compatible = "mmio-sram";
+        reg = <0xe63c0000 0x1000>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0 0xe63c0000 0x1000>;
+
+        smp-sram@0 {
+            compatible = "renesas,smp-sram";
+            reg = <0 0x10>;
+        };
+    };