cputlb: ensure _cmmu helper functions follow the naming standard
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Message ID 20191021132916.27818-1-alex.bennee@linaro.org
State New
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Series
  • cputlb: ensure _cmmu helper functions follow the naming standard
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Commit Message

Alex Bennée Oct. 21, 2019, 1:29 p.m. UTC
We document this in docs/devel/load-stores.rst so lets follow it. The
32 bit and 64 bit access functions have historically not included the
sign so we leave those as is.

The few places that use signed code loads are fixed up to do the
casting themselves.

Fixes: 282dffc8
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 accel/tcg/cputlb.c               |  6 +++---
 include/exec/cpu_ldst_template.h | 12 +++++++-----
 target/cris/translate.c          |  4 ++--
 target/cris/translate_v10.inc.c  |  7 +++----
 target/i386/translate.c          |  2 +-
 tcg/tcg.h                        | 14 +++++++-------
 6 files changed, 23 insertions(+), 22 deletions(-)

Comments

Peter Maydell Oct. 21, 2019, 1:33 p.m. UTC | #1
On Mon, 21 Oct 2019 at 14:29, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> We document this in docs/devel/load-stores.rst so lets follow it. The
> 32 bit and 64 bit access functions have historically not included the
> sign so we leave those as is.
>
> The few places that use signed code loads are fixed up to do the
> casting themselves.
>
> Fixes: 282dffc8
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>


> diff --git a/target/cris/translate.c b/target/cris/translate.c
> index e752bd06093..f7d3b3e4fdc 100644
> --- a/target/cris/translate.c
> +++ b/target/cris/translate.c
> @@ -231,7 +231,7 @@ static int cris_fetch(CPUCRISState *env, DisasContext *dc, uint32_t addr,
>      case 2:
>      {
>          if (sign) {
> -            r = cpu_ldsw_code(env, addr);
> +            r = (int16_t) cpu_lduw_code(env, addr);
>          } else {
>              r = cpu_lduw_code(env, addr);
>          }

Why not provide the cpu_ldsw_code() that returns an int16_t ?

thanks
-- PMM

Patch
diff mbox series

diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index defc8d59292..0c3f5d3027b 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1862,7 +1862,7 @@  static uint64_t full_ldub_cmmu(CPUArchState *env, target_ulong addr,
     return load_helper(env, addr, oi, retaddr, MO_8, true, full_ldub_cmmu);
 }
 
-uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr,
+uint8_t helper_ret_ldub_cmmu(CPUArchState *env, target_ulong addr,
                             TCGMemOpIdx oi, uintptr_t retaddr)
 {
     return full_ldub_cmmu(env, addr, oi, retaddr);
@@ -1875,7 +1875,7 @@  static uint64_t full_le_lduw_cmmu(CPUArchState *env, target_ulong addr,
                        full_le_lduw_cmmu);
 }
 
-uint16_t helper_le_ldw_cmmu(CPUArchState *env, target_ulong addr,
+uint16_t helper_le_lduw_cmmu(CPUArchState *env, target_ulong addr,
                             TCGMemOpIdx oi, uintptr_t retaddr)
 {
     return full_le_lduw_cmmu(env, addr, oi, retaddr);
@@ -1888,7 +1888,7 @@  static uint64_t full_be_lduw_cmmu(CPUArchState *env, target_ulong addr,
                        full_be_lduw_cmmu);
 }
 
-uint16_t helper_be_ldw_cmmu(CPUArchState *env, target_ulong addr,
+uint16_t helper_be_lduw_cmmu(CPUArchState *env, target_ulong addr,
                             TCGMemOpIdx oi, uintptr_t retaddr)
 {
     return full_be_lduw_cmmu(env, addr, oi, retaddr);
diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_template.h
index af7e0b49f2d..ddfb85da02f 100644
--- a/include/exec/cpu_ldst_template.h
+++ b/include/exec/cpu_ldst_template.h
@@ -65,8 +65,12 @@ 
 #ifdef SOFTMMU_CODE_ACCESS
 #define ADDR_READ addr_code
 #define MMUSUFFIX _cmmu
-#define URETSUFFIX SUFFIX
-#define SRETSUFFIX SUFFIX
+#define URETSUFFIX USUFFIX
+/*
+ * All code access functions are unsigned, I could poison this but it
+ * it would break further inclusions of this template.
+ */
+#define SRETSUFFIX _unused_
 #else
 #define ADDR_READ addr_read
 #define MMUSUFFIX _mmu
@@ -114,7 +118,7 @@  glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr)
     return glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(env, ptr, 0);
 }
 
-#if DATA_SIZE <= 2
+#if DATA_SIZE <= 2 && !defined(SOFTMMU_CODE_ACCESS)
 static inline int
 glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
                                                   target_ulong ptr,
@@ -126,11 +130,9 @@  glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env,
     int mmu_idx;
     TCGMemOpIdx oi;
 
-#if !defined(SOFTMMU_CODE_ACCESS)
     trace_guest_mem_before_exec(
         env_cpu(env), ptr,
         trace_mem_build_info(SHIFT, true, MO_TE, false));
-#endif
 
     addr = ptr;
     mmu_idx = CPU_MMU_INDEX;
diff --git a/target/cris/translate.c b/target/cris/translate.c
index e752bd06093..f7d3b3e4fdc 100644
--- a/target/cris/translate.c
+++ b/target/cris/translate.c
@@ -231,7 +231,7 @@  static int cris_fetch(CPUCRISState *env, DisasContext *dc, uint32_t addr,
     case 2:
     {
         if (sign) {
-            r = cpu_ldsw_code(env, addr);
+            r = (int16_t) cpu_lduw_code(env, addr);
         } else {
             r = cpu_lduw_code(env, addr);
         }
@@ -240,7 +240,7 @@  static int cris_fetch(CPUCRISState *env, DisasContext *dc, uint32_t addr,
     case 1:
     {
         if (sign) {
-            r = cpu_ldsb_code(env, addr);
+            r = (int8_t) cpu_ldub_code(env, addr);
         } else {
             r = cpu_ldub_code(env, addr);
         }
diff --git a/target/cris/translate_v10.inc.c b/target/cris/translate_v10.inc.c
index a87b8bb2813..0dd77368836 100644
--- a/target/cris/translate_v10.inc.c
+++ b/target/cris/translate_v10.inc.c
@@ -183,9 +183,9 @@  static int dec10_prep_move_m(CPUCRISState *env, DisasContext *dc,
         if (memsize != 4) {
             if (s_ext) {
                 if (memsize == 1)
-                    imm = cpu_ldsb_code(env, dc->pc + 2);
+                    imm = (int8_t) cpu_ldub_code(env, dc->pc + 2);
                 else
-                    imm = cpu_ldsw_code(env, dc->pc + 2);
+                    imm = (int16_t) cpu_lduw_code(env, dc->pc + 2);
             } else {
                 if (memsize == 1)
                     imm = cpu_ldub_code(env, dc->pc + 2);
@@ -1202,8 +1202,7 @@  static unsigned int dec10_ind(CPUCRISState *env, DisasContext *dc)
         case CRISV10_IND_BCC_M:
 
             cris_cc_mask(dc, 0);
-            imm = cpu_ldsw_code(env, dc->pc + 2);
-            simm = (int16_t)imm;
+            simm = (int16_t) cpu_lduw_code(env, dc->pc + 2);
             simm += 4;
 
             LOG_DIS("bcc_m: b%s %x\n", cc_name(dc->cond), dc->pc + simm);
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 868b0acafe8..edc915dcfd3 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -1930,7 +1930,7 @@  static inline uint8_t x86_ldub_code(CPUX86State *env, DisasContext *s)
 
 static inline int16_t x86_ldsw_code(CPUX86State *env, DisasContext *s)
 {
-    return cpu_ldsw_code(env, advance_pc(env, s, 2));
+    return (int16_t) cpu_lduw_code(env, advance_pc(env, s, 2));
 }
 
 static inline uint16_t x86_lduw_code(CPUX86State *env, DisasContext *s)
diff --git a/tcg/tcg.h b/tcg/tcg.h
index a37181c8998..a5388b89827 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -1269,16 +1269,16 @@  void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
 void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
                        TCGMemOpIdx oi, uintptr_t retaddr);
 
-uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr,
-                            TCGMemOpIdx oi, uintptr_t retaddr);
-uint16_t helper_le_ldw_cmmu(CPUArchState *env, target_ulong addr,
+uint8_t helper_ret_ldub_cmmu(CPUArchState *env, target_ulong addr,
                             TCGMemOpIdx oi, uintptr_t retaddr);
+uint16_t helper_le_lduw_cmmu(CPUArchState *env, target_ulong addr,
+                             TCGMemOpIdx oi, uintptr_t retaddr);
 uint32_t helper_le_ldl_cmmu(CPUArchState *env, target_ulong addr,
                             TCGMemOpIdx oi, uintptr_t retaddr);
 uint64_t helper_le_ldq_cmmu(CPUArchState *env, target_ulong addr,
                             TCGMemOpIdx oi, uintptr_t retaddr);
-uint16_t helper_be_ldw_cmmu(CPUArchState *env, target_ulong addr,
-                            TCGMemOpIdx oi, uintptr_t retaddr);
+uint16_t helper_be_lduw_cmmu(CPUArchState *env, target_ulong addr,
+                             TCGMemOpIdx oi, uintptr_t retaddr);
 uint32_t helper_be_ldl_cmmu(CPUArchState *env, target_ulong addr,
                             TCGMemOpIdx oi, uintptr_t retaddr);
 uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr,
@@ -1295,7 +1295,7 @@  uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr,
 # define helper_ret_stw_mmu   helper_be_stw_mmu
 # define helper_ret_stl_mmu   helper_be_stl_mmu
 # define helper_ret_stq_mmu   helper_be_stq_mmu
-# define helper_ret_ldw_cmmu  helper_be_ldw_cmmu
+# define helper_ret_lduw_cmmu  helper_be_lduw_cmmu
 # define helper_ret_ldl_cmmu  helper_be_ldl_cmmu
 # define helper_ret_ldq_cmmu  helper_be_ldq_cmmu
 #else
@@ -1308,7 +1308,7 @@  uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr,
 # define helper_ret_stw_mmu   helper_le_stw_mmu
 # define helper_ret_stl_mmu   helper_le_stl_mmu
 # define helper_ret_stq_mmu   helper_le_stq_mmu
-# define helper_ret_ldw_cmmu  helper_le_ldw_cmmu
+# define helper_ret_lduw_cmmu  helper_le_lduw_cmmu
 # define helper_ret_ldl_cmmu  helper_le_ldl_cmmu
 # define helper_ret_ldq_cmmu  helper_le_ldq_cmmu
 #endif