From patchwork Mon Oct 21 10:57:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mihailo Stojanovic X-Patchwork-Id: 1180468 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-511411-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rt-rk.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="mBDn6I9i"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46xYW51Kl9z9sNw for ; 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21 Oct 2019 10:57:11 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-21.1 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_NUMSUBJECT, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.1 spammy=quality X-HELO: mail.rt-rk.com Received: from mx2.rt-rk.com (HELO mail.rt-rk.com) (89.216.37.149) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 21 Oct 2019 10:57:07 +0000 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id C82FE1A1E0B; Mon, 21 Oct 2019 12:57:02 +0200 (CEST) Received: from rtrkw790-lin.domain.local (rtrkw790-lin.domain.local [192.168.237.60]) by mail.rt-rk.com (Postfix) with ESMTPSA id AE00A1A1DE4; Mon, 21 Oct 2019 12:57:02 +0200 (CEST) From: Mihailo Stojanovic To: gcc-patches@gcc.gnu.org Cc: Jeff Law , Dragan Mladjenovic , Mihailo Stojanovic Subject: [PATCH] [MIPS] PR82981 - mulditi3 pattern for MIPS64R6 Date: Mon, 21 Oct 2019 12:57:02 +0200 Message-Id: <1571655422-22115-1-git-send-email-mihailo.stojanovic@rt-rk.com> This expands the existing MIPS mulditi3 pattern by adding support for MIPS64R6 multiplication instructions. gcc/ChangeLog: * config/mips/mips.md (mulditi3): Generate patterns for high doubleword and low doubleword result of multiplication on MIPS64R6. gcc/testsuite/ChangeLog: * gcc.target/mips/mips64r6-ti-mult.c: New test. --- Not sure if I should add "PR target/82981" above the ChangeLog entries, as there was already one patch which addressed the issue, but didn't resolve it completely. --- gcc/config/mips/mips.md | 15 ++++++++++++--- gcc/testsuite/gcc.target/mips/mips64r6-ti-mult.c | 16 ++++++++++++++++ 2 files changed, 28 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/mips/mips64r6-ti-mult.c diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 4ad5c62..658f5e6 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -2464,9 +2464,11 @@ [(set (match_operand:TI 0 "register_operand") (mult:TI (any_extend:TI (match_operand:DI 1 "register_operand")) (any_extend:TI (match_operand:DI 2 "register_operand"))))] - "ISA_HAS_DMULT && !( == ZERO_EXTEND && TARGET_FIX_VR4120)" + "ISA_HAS_R6DMUL + || (ISA_HAS_DMULT + && !( == ZERO_EXTEND && TARGET_FIX_VR4120))" { - rtx hilo; + rtx hilo, hi, lo; if (TARGET_MIPS16) { @@ -2476,9 +2478,16 @@ } else if (TARGET_FIX_R4000) emit_insn (gen_mulditi3_r4000 (operands[0], operands[1], operands[2])); - else + else if (ISA_HAS_DMULT) emit_insn (gen_mulditi3_internal (operands[0], operands[1], operands[2])); + else + { + hi = mips_subword (operands[0], 1); + lo = mips_subword (operands[0], 0); + emit_insn (gen_muldi3_mul3_nohilo (lo, operands[1], operands[2])); + emit_insn (gen_muldi3_highpart_r6 (hi, operands[1], operands[2])); + } DONE; }) diff --git a/gcc/testsuite/gcc.target/mips/mips64r6-ti-mult.c b/gcc/testsuite/gcc.target/mips/mips64r6-ti-mult.c new file mode 100644 index 0000000..f969e76 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/mips64r6-ti-mult.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mabi=64 -march=mips64r6" } */ +/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } } */ + +typedef unsigned __int128 u128; +typedef unsigned long long u64; + +u128 +test (u64 a, u64 b) +{ + return (u128)a * (u128)b; +} + +/* { dg-final { scan-assembler-not "__multi3" } } */ +/* { dg-final { scan-assembler "dmul" } } */ +/* { dg-final { scan-assembler "dmuhu" } } */