From patchwork Mon Oct 21 06:59:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: mingming lee X-Patchwork-Id: 1180362 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46xSHz2sFVz9sNw for ; Mon, 21 Oct 2019 18:02:23 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 19A75C21E31; Mon, 21 Oct 2019 07:01:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: * X-Spam-Status: No, score=1.3 required=5.0 tests=RDNS_NONE, UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9E34CC21E31; Mon, 21 Oct 2019 07:00:41 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 7BED2C21C2C; Mon, 21 Oct 2019 07:00:24 +0000 (UTC) Received: from mailgw01.mediatek.com (unknown [1.203.163.78]) by lists.denx.de (Postfix) with ESMTP id 315B9C21DD9 for ; Mon, 21 Oct 2019 07:00:02 +0000 (UTC) X-UUID: 33f605ca70424fb3bd5b5629ccb9034b-20191021 X-UUID: 33f605ca70424fb3bd5b5629ccb9034b-20191021 Received: from mtkcas36.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 2015739591; Mon, 21 Oct 2019 14:59:48 +0800 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS32DR.mediatek.inc (172.27.6.104) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 21 Oct 2019 14:59:44 +0800 Received: from localhost.localdomain (172.27.4.253) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 21 Oct 2019 14:59:44 +0800 From: mingming lee To: Tom Rini , Matthias Brugger , Lukasz Majewski , Peng Fan Date: Mon, 21 Oct 2019 14:59:08 +0800 Message-ID: <20191021065908.31680-6-mingming.lee@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20191021065908.31680-1-mingming.lee@mediatek.com> References: <20191021065908.31680-1-mingming.lee@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 1D19815E4AC0112E51E60ABBAA727A2E88F03A2E3A242961C86F3390809598E32000:8 X-Content-Filtered-By: Mailman/MimeDel 2.1.18 Cc: u-boot@lists.denx.de, GSS_MTK_Uboot_upstream Subject: [U-Boot] [PATCH v2 5/5] ARM: MediaTek: add basic support for MT8518 boards X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This adds a general board file based on MT8518 SoCs from MediaTek. Apart from the generic parts (cpu) we add some low level init codes and initialize the early clocks. This commit is adding the basic boot support for the MT8518 eMMC board. Signed-off-by: mingming lee --- Changes for v2: - print debug log using debug() api - delete unnecessary configs and code - change emmc hs200 to hs400 to speed up boot time --- arch/arm/dts/Makefile | 3 +- arch/arm/dts/mt8518-ap1-emmc.dts | 104 +++++++++++++++++++++++++++++ arch/arm/mach-mediatek/Kconfig | 1 + board/mediatek/mt8518/Kconfig | 14 ++++ board/mediatek/mt8518/MAINTAINERS | 6 ++ board/mediatek/mt8518/Makefile | 3 + board/mediatek/mt8518/mt8518_ap1.c | 18 +++++ configs/mt8518_ap1_emmc_defconfig | 41 ++++++++++++ include/configs/mt8518.h | 68 +++++++++++++++++++ 9 files changed, 257 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/mt8518-ap1-emmc.dts create mode 100644 board/mediatek/mt8518/Kconfig create mode 100644 board/mediatek/mt8518/MAINTAINERS create mode 100644 board/mediatek/mt8518/Makefile create mode 100644 board/mediatek/mt8518/mt8518_ap1.c create mode 100644 configs/mt8518_ap1_emmc_defconfig create mode 100644 include/configs/mt8518.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index aac1b83d49..54ca31c995 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -788,7 +788,8 @@ dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \ dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt7623n-bananapi-bpi-r2.dtb \ mt7629-rfb.dtb \ - mt8516-pumpkin.dtb + mt8516-pumpkin.dtb \ + mt8518-ap1-emmc.dtb dtb-$(CONFIG_TARGET_GE_BX50V3) += imx6q-bx50v3.dtb dtb-$(CONFIG_TARGET_MX53PPD) += imx53-ppd.dtb diff --git a/arch/arm/dts/mt8518-ap1-emmc.dts b/arch/arm/dts/mt8518-ap1-emmc.dts new file mode 100644 index 0000000000..f017ee4431 --- /dev/null +++ b/arch/arm/dts/mt8518-ap1-emmc.dts @@ -0,0 +1,104 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2019 MediaTek Inc. + * Author: Mingming Lee + * + */ + +/dts-v1/; + +#include +#include "mt8518.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + + model = "MT8518 AP1 EMMC"; + + chosen { + stdout-path = &uart0; + tick-timer = &timer0; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x40000000 0x10000000>; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_default>; + bus-width = <8>; + max-frequency = <200000000>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + cap-mmc-hw-reset; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + non-removable; + status = "okay"; +}; + +&pinctrl { + mmc0_pins_default: mmc0default { + mux { + function = "msdc"; + groups = "msdc0"; + }; + + conf-cmd-data { + pins = "MSDC0_CMD", "MSDC0_DAT0", "MSDC0_DAT1", + "MSDC0_DAT2", "MSDC0_DAT3", "MSDC0_DAT4", + "MSDC0_DAT5", "MSDC0_DAT6", "MSDC0_DAT7"; + input-enable; + bias-pull-up; + }; + + conf-clk { + pins = "MSDC0_CLK"; + bias-pull-down; + }; + + conf-rst { + pins = "MSDC0_RSTB"; + bias-pull-up; + }; + }; + + uart0_pins: uart0 { + mux { + function = "uart"; + groups = "uart0_0_rxd_txd"; + }; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&watchdog0 { + status = "okay"; +}; diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig index 8e343c3182..a5808bd343 100644 --- a/arch/arm/mach-mediatek/Kconfig +++ b/arch/arm/mach-mediatek/Kconfig @@ -52,5 +52,6 @@ endchoice source "board/mediatek/mt7623/Kconfig" source "board/mediatek/mt7629/Kconfig" source "board/mediatek/pumpkin/Kconfig" +source "board/mediatek/mt8518/Kconfig" endif diff --git a/board/mediatek/mt8518/Kconfig b/board/mediatek/mt8518/Kconfig new file mode 100644 index 0000000000..1971c4d8c3 --- /dev/null +++ b/board/mediatek/mt8518/Kconfig @@ -0,0 +1,14 @@ +if TARGET_MT8518 + +config SYS_BOARD + default "mt8518" + +config SYS_CONFIG_NAME + default "mt8518" + + +config MTK_BROM_HEADER_INFO + string + default "media=nor" + +endif diff --git a/board/mediatek/mt8518/MAINTAINERS b/board/mediatek/mt8518/MAINTAINERS new file mode 100644 index 0000000000..c9151947ad --- /dev/null +++ b/board/mediatek/mt8518/MAINTAINERS @@ -0,0 +1,6 @@ +MT8518 +M: Mingming lee +S: Maintained +F: board/mediatek/mt8518 +F: include/configs/mt8518.h +F: configs/mt8518_ap1_emmc_defconfig diff --git a/board/mediatek/mt8518/Makefile b/board/mediatek/mt8518/Makefile new file mode 100644 index 0000000000..0884b32c56 --- /dev/null +++ b/board/mediatek/mt8518/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-y += mt8518_ap1.o diff --git a/board/mediatek/mt8518/mt8518_ap1.c b/board/mediatek/mt8518/mt8518_ap1.c new file mode 100644 index 0000000000..9710907fe2 --- /dev/null +++ b/board/mediatek/mt8518/mt8518_ap1.c @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 MediaTek Inc. + */ + +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + + debug("gd->fdt_blob is %p\n", gd->fdt_blob); + return 0; +} diff --git a/configs/mt8518_ap1_emmc_defconfig b/configs/mt8518_ap1_emmc_defconfig new file mode 100644 index 0000000000..28247729f8 --- /dev/null +++ b/configs/mt8518_ap1_emmc_defconfig @@ -0,0 +1,41 @@ +CONFIG_ARM=y +CONFIG_POSITION_INDEPENDENT=y +CONFIG_ARCH_MEDIATEK=y +CONFIG_SYS_TEXT_BASE=0x44E00000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_TARGET_MT8518=y +CONFIG_SYS_PROMPT="MT8518> " +CONFIG_NR_DRAM_BANKS=1 +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_OF_LIBFDT=y +# CONFIG_FDT_DEBUG is not set +CONFIG_LZMA=y +CONFIG_LZ4=y +CONFIG_LZO=y +CONFIG_GZIP=y +CONFIG_BZIP2=y +CONFIG_CMD_BOOTMENU=y +CONFIG_MENU_SHOW=y +CONFIG_DEFAULT_FDT_FILE="mt8518-ap1-emmc" +CONFIG_DEFAULT_DEVICE_TREE="mt8518-ap1-emmc" +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MT8518=y +CONFIG_RAM=y +CONFIG_BAUDRATE=921600 +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_DM=y +# CONFIG_DM_DEBUG is not set +CONFIG_DM_SERIAL=y +CONFIG_MTK_SERIAL=y +CONFIG_WDT=y +CONFIG_WDT_MTK=y +CONFIG_CLK=y +CONFIG_TIMER=y +CONFIG_MTK_TIMER=y +CONFIG_CMD_MMC=y +CONFIG_DM_MMC=y +CONFIG_MMC_MTK=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_ENV_IS_IN_MMC=y diff --git a/include/configs/mt8518.h b/include/configs/mt8518.h new file mode 100644 index 0000000000..8906245a62 --- /dev/null +++ b/include/configs/mt8518.h @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Configuration for MediaTek MT8518 SoC + * + * Copyright (C) 2019 MediaTek Inc. + * Author: Mingming Lee + */ + +#ifndef __MT8518_H +#define __MT8518_H + +#include + +#define CONFIG_ENV_SIZE SZ_4K + +/* Machine ID */ +#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M + +#define CONFIG_CPU_ARMV8 + +#define COUNTER_FREQUENCY 13000000 + +/* DRAM definition */ +#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CONFIG_SYS_SDRAM_SIZE 0x20000000 + +#define CONFIG_SYS_LOAD_ADDR 0x41000000 +#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR + +#define CONFIG_SYS_MALLOC_LEN SZ_32M +#define CONFIG_SYS_BOOTM_LEN SZ_64M + +/* Uboot definition */ +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + \ + SZ_2M - \ + GENERATED_GBL_DATA_SIZE) + +/* ENV Setting */ +#if defined(CONFIG_MMC_MTK) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_OFFSET 0x4E60000 +#define CONFIG_ENV_OVERWRITE + +/* MMC offset in block unit,and block size is 0x200 */ +#define ENV_BOOT_READ_IMAGE \ + "boot_rd_img=mmc dev 0" \ + ";mmc read ${loadaddr} 0x27400 0x4000" \ + ";iminfo ${loadaddr}\0" +#endif + +/* Console configuration */ +#define ENV_DEVICE_SETTINGS \ + "stdin=serial\0" \ + "stdout=serial\0" \ + "stderr=serial\0" + +#define ENV_BOOT_CMD \ + "mtk_boot=run boot_rd_img;bootm;\0" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0x6c000000\0" \ + ENV_DEVICE_SETTINGS \ + ENV_BOOT_READ_IMAGE \ + ENV_BOOT_CMD \ + "bootcmd=run mtk_boot;\0" \ + +#endif