[U-Boot,v3,095/108] x86: apollolake: Add systemagent driver
diff mbox series

Message ID 20191021033913.220758-90-sjg@chromium.org
State New
Delegated to: Bin Meng
Headers show
Series
  • x86: Add initial support for apollolake
Related show

Commit Message

Simon Glass Oct. 21, 2019, 3:39 a.m. UTC
This driver handles communication with the systemagent which needs to be
told when U-Boot has completed its init.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

Changes in v3: None
Changes in v2: None

 arch/x86/cpu/apollolake/Makefile              |  2 ++
 arch/x86/cpu/apollolake/systemagent.c         | 19 ++++++++++++
 .../include/asm/arch-apollolake/systemagent.h | 31 +++++++++++++++++++
 3 files changed, 52 insertions(+)
 create mode 100644 arch/x86/cpu/apollolake/systemagent.c
 create mode 100644 arch/x86/include/asm/arch-apollolake/systemagent.h

Comments

Andy Shevchenko Oct. 21, 2019, 8:16 a.m. UTC | #1
On Mon, Oct 21, 2019 at 7:29 AM Simon Glass <sjg@chromium.org> wrote:
>
> This driver handles communication with the systemagent which needs to be
> told when U-Boot has completed its init.

> +#define VTBAR_MASK             0xfffffff000ull

Don't we have GENMASK() ?

Patch
diff mbox series

diff --git a/arch/x86/cpu/apollolake/Makefile b/arch/x86/cpu/apollolake/Makefile
index fa53ea10b79..351fba21298 100644
--- a/arch/x86/cpu/apollolake/Makefile
+++ b/arch/x86/cpu/apollolake/Makefile
@@ -2,6 +2,8 @@ 
 #
 # Copyright (c) 2016 Google, Inc
 
+obj-$(CONFIG_SPL_BUILD) += systemagent.o
+
 obj-y += gpio.o
 obj-y += lpss.o
 obj-y += pmc.o
diff --git a/arch/x86/cpu/apollolake/systemagent.c b/arch/x86/cpu/apollolake/systemagent.c
new file mode 100644
index 00000000000..3a41b329c3d
--- /dev/null
+++ b/arch/x86/cpu/apollolake/systemagent.c
@@ -0,0 +1,19 @@ 
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 Intel Corporation.
+ * Take from coreboot project file of the same name
+ */
+
+#include <common.h>
+#include <asm/intel_regs.h>
+#include <asm/io.h>
+#include <asm/arch/systemagent.h>
+
+void enable_bios_reset_cpl(void)
+{
+	/*
+	 * Set bits 0+1 of BIOS_RESET_CPL to indicate to the CPU
+	 * that BIOS has initialised memory and power management
+	 */
+	setbits_8(MCHBAR_REG(BIOS_RESET_CPL), 3);
+}
diff --git a/arch/x86/include/asm/arch-apollolake/systemagent.h b/arch/x86/include/asm/arch-apollolake/systemagent.h
new file mode 100644
index 00000000000..5983e4e6302
--- /dev/null
+++ b/arch/x86/include/asm/arch-apollolake/systemagent.h
@@ -0,0 +1,31 @@ 
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2017 Intel Corporation.
+ * Take from coreboot project file of the same name
+ */
+
+#ifndef __ARCH_SYSTEMAGENT_H
+#define __ARCH_SYSTEMAGENT_H
+
+/* Device 0:0.0 PCI configuration space */
+#define MCHBAR		0x48
+
+/* RAPL Package Power Limit register under MCHBAR */
+#define PUNIT_THERMAL_DEVICE_IRQ		0x700C
+#define PUINT_THERMAL_DEVICE_IRQ_VEC_NUMBER	0x18
+#define PUINT_THERMAL_DEVICE_IRQ_LOCK		0x80000000
+#define BIOS_RESET_CPL		0x7078
+#define   PCODE_INIT_DONE	BIT(8)
+#define MCHBAR_RAPL_PPL		0x70A8
+#define CORE_DISABLE_MASK	0x7168
+#define CAPID0_A		0xE4
+#define   VTD_DISABLE		BIT(23)
+#define DEFVTBAR		0x6c80
+#define GFXVTBAR		0x6c88
+#define   VTBAR_ENABLED		0x01
+#define VTBAR_MASK		0xfffffff000ull
+#define VTBAR_SIZE		0x1000
+
+void enable_bios_reset_cpl(void);
+
+#endif