On Mon, Oct 21, 2019 at 11:40 AM Simon Glass <sjg@chromium.org> wrote: > > At present if SPL sets up the microcode then it is still included in > U-Boot as well. This is wasteful as microcode is large. Adjust the logic > in the image to prevent this. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > Changes in v3: None > Changes in v2: None > > arch/x86/dts/u-boot.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi index 9796f4776a3..bb61b6e8af1 100644 --- a/arch/x86/dts/u-boot.dtsi +++ b/arch/x86/dts/u-boot.dtsi @@ -63,9 +63,16 @@ offset = <CONFIG_X86_OFFSET_U_BOOT>; }; #else +# ifdef CONFIG_SPL + u-boot { + offset = <CONFIG_SYS_TEXT_BASE>; + }; +# else + /* If there is no SPL then we need to put microcode in U-Boot */ u-boot-with-ucode-ptr { offset = <CONFIG_X86_OFFSET_U_BOOT>; }; +# endif #endif #ifdef CONFIG_HAVE_MICROCODE u-boot-dtb-with-ucode {
At present if SPL sets up the microcode then it is still included in U-Boot as well. This is wasteful as microcode is large. Adjust the logic in the image to prevent this. Signed-off-by: Simon Glass <sjg@chromium.org> --- Changes in v3: None Changes in v2: None arch/x86/dts/u-boot.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)