From patchwork Mon Oct 21 03:39:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1180256 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="E1D2eUnT"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46xNYr73PWz9sP6 for ; Mon, 21 Oct 2019 15:14:08 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 75D97C21DA6; Mon, 21 Oct 2019 03:43:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9B263C21DF8; Mon, 21 Oct 2019 03:42:58 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id AA17BC21DFD; Mon, 21 Oct 2019 03:40:58 +0000 (UTC) Received: from mail-io1-f65.google.com (mail-io1-f65.google.com [209.85.166.65]) by lists.denx.de (Postfix) with ESMTPS id 2DB75C21DA6 for ; Mon, 21 Oct 2019 03:40:58 +0000 (UTC) Received: by mail-io1-f65.google.com with SMTP id 1so2827194iou.4 for ; Sun, 20 Oct 2019 20:40:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xmHj7wYAPp0MoSeAAyEoq0Pser+TlUpvz3YINYH6E5I=; b=E1D2eUnT00bIJg+67cwKr8cpZc9tF570LIkuPC7zykZ5utbniGQVuYx6pCWs0TkybH OefkJtNEsIII2gDewNtf/JkD1VQczUTTky1jJ4eplzrZZ2rr8Fjqnfz+fG3FoRJ2gBZp IZ455rZuXNWKkyZ/YdK6o45KOn9VicRl3VtHA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xmHj7wYAPp0MoSeAAyEoq0Pser+TlUpvz3YINYH6E5I=; b=bs8VyjEcLlpi8Yc4FPuAsMV6wCxMulvwVPyq6VYMHPET8ZJXcQrKi/yuYZM5Wwu+pw tj9cW5+jH1fNf52kTFspHRRP0L/FuOe7Nd4YVNl+Cc++FrCbYP9HF5yyMM2Wyp6keuSF pKmL0dQQ/WJNJ8R9qbGBmKmJuV0lmMrOk71Iga9ZW1RsTif1s6jvZgI6+ka2N+n02Bq5 dIk6wafydUT7UqczTsTY45C8yWoC9wFPLIByjACCAYRMqyHTMtvKVg8vbU8Ve+QwLOlu A0tZmeAk4dja08mSXqqMDouhmBARF/915SlFr9ahhnd9ibWcG72S49rV/ThHUY9jY2/m aB+w== X-Gm-Message-State: APjAAAXaU3x+LDHUwAsE0716LBxct4UohC3A3tOh/1duV55QVNTBc46m TIfCsflS9nGHHpneUTNTJwNYGDnoHFiyqg== X-Google-Smtp-Source: APXvYqy85FMKp/ms11yYvJ1DJFXuAyiveaLdlMjuUs+/bGd4bdaLScm3+idQ0JAbnWuJovCemF94Kw== X-Received: by 2002:a6b:37c6:: with SMTP id e189mr18838202ioa.61.1571629256940; Sun, 20 Oct 2019 20:40:56 -0700 (PDT) Received: from kiwi.bld.corp.google.com ([2620:15c:183:0:8223:87c:a681:66aa]) by smtp.gmail.com with ESMTPSA id x14sm1947028ion.67.2019.10.20.20.40.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Oct 2019 20:40:56 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Date: Sun, 20 Oct 2019 21:39:10 -0600 Message-Id: <20191021033913.220758-100-sjg@chromium.org> X-Mailer: git-send-email 2.23.0.866.gb869b98d4c-goog In-Reply-To: <20191021033913.220758-22-sjg@chromium.org> References: <20191021033913.220758-22-sjg@chromium.org> MIME-Version: 1.0 Cc: Hannes Schmelzer Subject: [U-Boot] [PATCH v3 105/108] x86: apollolake: Add Kconfig and Makefile X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add basic plumbing to allow apollolake support to be used. Signed-off-by: Simon Glass --- Changes in v3: - Add MMC, video, USB configs - Add an APL_SPI_FLASH_BOOT option to enable non-mmap boot - Fix the incorrect value of CPU_ADDR_BITS Changes in v2: None arch/x86/Kconfig | 1 + arch/x86/cpu/Makefile | 1 + arch/x86/cpu/apollolake/Kconfig | 87 +++++++++++++++++++++++++++++++++ 3 files changed, 89 insertions(+) create mode 100644 arch/x86/cpu/apollolake/Kconfig diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index c9f1b6d8ada..36a0021adb7 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -106,6 +106,7 @@ source "board/google/Kconfig" source "board/intel/Kconfig" # platform-specific options below +source "arch/x86/cpu/apollolake/Kconfig" source "arch/x86/cpu/baytrail/Kconfig" source "arch/x86/cpu/braswell/Kconfig" source "arch/x86/cpu/broadwell/Kconfig" diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile index b6a010ea320..4c151f8c94d 100644 --- a/arch/x86/cpu/Makefile +++ b/arch/x86/cpu/Makefile @@ -41,6 +41,7 @@ extra-y += call32.o endif obj-y += intel_common/ +obj-$(CONFIG_INTEL_APOLLOLAKE) += apollolake/ obj-$(CONFIG_INTEL_BAYTRAIL) += baytrail/ obj-$(CONFIG_INTEL_BRASWELL) += braswell/ obj-$(CONFIG_INTEL_BROADWELL) += broadwell/ diff --git a/arch/x86/cpu/apollolake/Kconfig b/arch/x86/cpu/apollolake/Kconfig new file mode 100644 index 00000000000..e49ba5cb512 --- /dev/null +++ b/arch/x86/cpu/apollolake/Kconfig @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright 2019 Google LLC +# + +config INTEL_APOLLOLAKE + bool + select FSP_VERSION2 + select HAVE_FSP + select ARCH_MISC_INIT + select USE_CAR + select INTEL_PMC + select TPL_X86_TSC_TIMER_NATIVE + select SPL_PCH_SUPPORT + select TPL_PCH_SUPPORT + select PCH_SUPPORT + select P2SB + imply ENABLE_MRC_CACHE + imply AHCI_PCI + imply SCSI + imply SCSI_AHCI + imply SPI_FLASH + imply USB + imply USB_EHCI_HCD + imply TPL + imply SPL + imply TPL_X86_16BIT_INIT + imply TPL_OF_PLATDATA + imply ACPI_PMC + imply MMC + imply DM_MMC + imply MMC_PCI + imply MMC_SDHCI + imply CMD_MMC + imply VIDEO_FSP + +if INTEL_APOLLOLAKE + +config DCACHE_RAM_BASE + default 0xfef00000 + +config DCACHE_RAM_SIZE + default 0xc0000 + +config DCACHE_RAM_MRC_VAR_SIZE + default 0xb0000 + +config CPU_SPECIFIC_OPTIONS + def_bool y + select SMM_TSEG + select X86_RAMTEST + +config SMM_TSEG_SIZE + hex + default 0x800000 + +config MMCONF_BASE_ADDRESS + hex + default 0xe0000000 + +config INTEL_GPIO_DUAL_ROUTE_SUPPORT + def_bool y + +config INTEL_GPIO_PADCFG_PADTOL + def_bool n + +config INTEL_GPIO_IOSTANDBY + def_bool y + +config TPL_SIZE_LIMIT + default 0x7800 + +config CPU_ADDR_BITS + default 39 + +config APL_SPI_FLASH_BOOT + bool "Support booting with SPI-flash driver instead memory-mapped SPI" + select TPL_SPI_FLASH_SUPPORT + select TPL_SPI_SUPPORT + help + If you want to set BOOT_FROM_FAST_SPI_FLASH to true, enable this + option. It enables SPI and SPI flash in TPL. Without the this only + available boot method is to use memory-mapped SPI. Since this is + actually fast and produces a TPL which is 7KB smaller, it is the + default. + +endif