| Message ID | 20191021033913.220758-89-sjg@chromium.org |
|---|---|
| State | Superseded |
| Delegated to: | Bin Meng |
| Headers | show |
| Series | x86: Add initial support for apollolake | expand |
Hello Simon, Am 21.10.2019 um 05:38 schrieb Simon Glass: > For apollolake we need to take the I2C bus controller out of reset before > using this. Add this functionality to the driver. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > Changes in v3: > - Add a weak function to avoid errors on other platforms > > Changes in v2: None > > drivers/i2c/dw_i2c_pci.c | 20 +++++++++++++++++++- > 1 file changed, 19 insertions(+), 1 deletion(-) > > diff --git a/drivers/i2c/dw_i2c_pci.c b/drivers/i2c/dw_i2c_pci.c > index 065c0aa5994..d6d93f08a56 100644 > --- a/drivers/i2c/dw_i2c_pci.c > +++ b/drivers/i2c/dw_i2c_pci.c > @@ -6,8 +6,14 @@ > */ > > #include <dm.h> > +#include <asm/lpss.h> > #include "designware_i2c.h" > > +enum { > + VANILLA = 0, > + INTEL_APL, > +}; > + > /* BayTrail HCNT/LCNT/SDA hold time */ > static struct dw_scl_sda_cfg byt_config = { > .ss_hcnt = 0x200, > @@ -17,6 +23,9 @@ static struct dw_scl_sda_cfg byt_config = { > .sda_hold = 0x6, > }; > > +/* Have a weak function for now - possibly should be a new uclass */ > +void lpss_reset_release(void *regs); > + > static int designware_i2c_pci_probe(struct udevice *dev) > { > struct dw_i2c *priv = dev_get_priv(dev); > @@ -25,9 +34,12 @@ static int designware_i2c_pci_probe(struct udevice *dev) > priv->regs = (struct i2c_regs *) > dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM); > if (IS_ENABLED(CONFIG_INTEL_BAYTRAIL)) > - /* Use BayTrail specific timing values */ > + /* Use BayTrail-specific timing values */ Nitpick only: unrelated change. Reviewed-by: Heiko Schocher <hs@denx.de> [...] bye, Heiko
diff --git a/drivers/i2c/dw_i2c_pci.c b/drivers/i2c/dw_i2c_pci.c index 065c0aa5994..d6d93f08a56 100644 --- a/drivers/i2c/dw_i2c_pci.c +++ b/drivers/i2c/dw_i2c_pci.c @@ -6,8 +6,14 @@ */ #include <dm.h> +#include <asm/lpss.h> #include "designware_i2c.h" +enum { + VANILLA = 0, + INTEL_APL, +}; + /* BayTrail HCNT/LCNT/SDA hold time */ static struct dw_scl_sda_cfg byt_config = { .ss_hcnt = 0x200, @@ -17,6 +23,9 @@ static struct dw_scl_sda_cfg byt_config = { .sda_hold = 0x6, }; +/* Have a weak function for now - possibly should be a new uclass */ +void lpss_reset_release(void *regs); + static int designware_i2c_pci_probe(struct udevice *dev) { struct dw_i2c *priv = dev_get_priv(dev); @@ -25,9 +34,12 @@ static int designware_i2c_pci_probe(struct udevice *dev) priv->regs = (struct i2c_regs *) dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM); if (IS_ENABLED(CONFIG_INTEL_BAYTRAIL)) - /* Use BayTrail specific timing values */ + /* Use BayTrail-specific timing values */ priv->scl_sda_cfg = &byt_config; + if (dev_get_driver_data(dev) == INTEL_APL) + lpss_reset_release(priv->regs); + return designware_i2c_probe(dev); } @@ -72,6 +84,12 @@ static struct pci_device_id designware_pci_supported[] = { { PCI_VDEVICE(INTEL, 0x0f45) }, { PCI_VDEVICE(INTEL, 0x0f46) }, { PCI_VDEVICE(INTEL, 0x0f47) }, + { PCI_VDEVICE(INTEL, 0x5aac), .driver_data = INTEL_APL }, + { PCI_VDEVICE(INTEL, 0x5aae), .driver_data = INTEL_APL }, + { PCI_VDEVICE(INTEL, 0x5ab0), .driver_data = INTEL_APL }, + { PCI_VDEVICE(INTEL, 0x5ab2), .driver_data = INTEL_APL }, + { PCI_VDEVICE(INTEL, 0x5ab4), .driver_data = INTEL_APL }, + { PCI_VDEVICE(INTEL, 0x5ab6), .driver_data = INTEL_APL }, {}, };
For apollolake we need to take the I2C bus controller out of reset before using this. Add this functionality to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> --- Changes in v3: - Add a weak function to avoid errors on other platforms Changes in v2: None drivers/i2c/dw_i2c_pci.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-)