@@ -2,4 +2,5 @@
#
# Copyright (c) 2016 Google, Inc
+obj-y += lpss.o
obj-y += pmc.o
new file mode 100644
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Special driver to handle of-platdata
+ *
+ * Copyright 2019 Google LLC
+ *
+ * Some code from coreboot lpss.c
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/lpss.h>
+
+enum {
+ LPSS_RESET_CTL_REG = 0x204,
+
+ /*
+ * Bit 1:0 controls LPSS controller reset.
+ *
+ * 00 ->LPSS Host Controller is in reset (Reset Asserted)
+ * 01/10 ->Reserved
+ * 11 ->LPSS Host Controller is NOT at reset (Reset Released)
+ */
+ LPSS_CNT_RST_RELEASE = 3,
+};
+
+/* Take controller out of reset */
+void lpss_reset_release(void *regs)
+{
+ writel(LPSS_CNT_RST_RELEASE, regs + LPSS_RESET_CTL_REG);
+}
new file mode 100644
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright 2019 Google LLC
+ */
+
+#ifndef __ASM_LPSS_H
+#define __ASM_LPSS_H
+
+void lpss_reset_release(void *regs);
+
+#endif
Add very basic support for taking an lpss device out of reset. Signed-off-by: Simon Glass <sjg@chromium.org> --- Changes in v3: None Changes in v2: None arch/x86/cpu/apollolake/Makefile | 1 + arch/x86/cpu/apollolake/lpss.c | 31 +++++++++++++++++++++++++++++++ arch/x86/include/asm/lpss.h | 11 +++++++++++ 3 files changed, 43 insertions(+) create mode 100644 arch/x86/cpu/apollolake/lpss.c create mode 100644 arch/x86/include/asm/lpss.h