--- gcc/config/i386/i386-protos.h.jj	2019-10-19 14:45:47.693185643 +0200
+++ gcc/config/i386/i386-protos.h	2019-10-19 19:08:12.371359926 +0200
@@ -55,6 +55,7 @@ extern rtx standard_80387_constant_rtx (
 extern int standard_sse_constant_p (rtx, machine_mode);
 extern const char *standard_sse_constant_opcode (rtx_insn *, rtx *);
 extern bool ix86_standard_x87sse_constant_load_p (const rtx_insn *, rtx);
+extern bool ix86_pre_reload_split (void);
 extern bool symbolic_reference_mentioned_p (rtx);
 extern bool extended_reg_mentioned_p (rtx);
 extern bool x86_extended_QIreg_mentioned_p (rtx_insn *);
--- gcc/config/i386/i386.c.jj	2019-10-19 14:45:47.729185094 +0200
+++ gcc/config/i386/i386.c	2019-10-19 19:08:12.376359849 +0200
@@ -4894,6 +4894,18 @@ ix86_standard_x87sse_constant_load_p (co
   return true;
 }
 
+/* Predicate for pre-reload splitters with associated instructions,
+   which can match any time before the split1 pass (usually combine),
+   then are unconditionally split in that pass and should not be
+   matched again afterwards.  */
+
+bool
+ix86_pre_reload_split (void)
+{
+  return (can_create_pseudo_p ()
+	  && !(cfun->curr_properties & PROP_rtl_split_insns));
+}
+
 /* Returns true if OP contains a symbol reference */
 
 bool
--- gcc/config/i386/i386.md.jj	2019-10-19 14:46:15.489760948 +0200
+++ gcc/config/i386/i386.md	2019-10-19 19:08:12.381359773 +0200
@@ -4920,7 +4920,7 @@ (define_insn_and_split "*fix_trunc<mode>
    && !TARGET_FISTTP
    && !(SSE_FLOAT_MODE_P (GET_MODE (operands[1]))
 	 && (TARGET_64BIT || <MODE>mode != DImode))
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(const_int 0)]
@@ -6857,7 +6857,7 @@ (define_insn_and_split "*add<mode>3_eq"
 	  (match_operand:SWI 2 "<general_operand>")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (reg:CC FLAGS_REG)
@@ -6881,7 +6881,7 @@ (define_insn_and_split "*add<mode>3_ne"
    && (<MODE>mode != DImode
        || INTVAL (operands[2]) != HOST_WIDE_INT_C (-0x80000000))
    && ix86_binary_operator_ok (PLUS, <MODE>mode, operands)
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (reg:CC FLAGS_REG)
@@ -6904,7 +6904,7 @@ (define_insn_and_split "*add<mode>3_eq_0
 	  (match_operand:SWI 1 "<general_operand>")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_unary_operator_ok (PLUS, <MODE>mode, operands)
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (reg:CC FLAGS_REG)
@@ -6925,7 +6925,7 @@ (define_insn_and_split "*add<mode>3_ne_0
 	  (match_operand:SWI 1 "<general_operand>")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_unary_operator_ok (PLUS, <MODE>mode, operands)
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (reg:CC FLAGS_REG)
@@ -6951,7 +6951,7 @@ (define_insn_and_split "*sub<mode>3_eq"
 	  (match_operand:SWI 2 "<general_operand>")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (reg:CC FLAGS_REG)
@@ -6976,7 +6976,7 @@ (define_insn_and_split "*sub<mode>3_ne"
    && (<MODE>mode != DImode
        || INTVAL (operands[2]) != HOST_WIDE_INT_C (-0x80000000))
    && ix86_binary_operator_ok (MINUS, <MODE>mode, operands)
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (reg:CC FLAGS_REG)
@@ -7005,7 +7005,7 @@ (define_insn_and_split "*sub<mode>3_eq_1
    && (<MODE>mode != DImode
        || INTVAL (operands[2]) != HOST_WIDE_INT_C (-0x80000000))
    && ix86_binary_operator_ok (MINUS, <MODE>mode, operands)
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (reg:CC FLAGS_REG)
@@ -7028,7 +7028,7 @@ (define_insn_and_split "*sub<mode>3_eq_0
 	  (eq:SWI (match_operand 2 "int_nonimmediate_operand") (const_int 0))))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_unary_operator_ok (MINUS, <MODE>mode, operands)
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (reg:CC FLAGS_REG)
@@ -7049,7 +7049,7 @@ (define_insn_and_split "*sub<mode>3_ne_0
 	  (ne:SWI (match_operand 2 "int_nonimmediate_operand") (const_int 0))))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_unary_operator_ok (MINUS, <MODE>mode, operands)
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (reg:CC FLAGS_REG)
@@ -8621,7 +8621,7 @@ (define_insn_and_split "*anddi3_doublewo
    (clobber (reg:CC FLAGS_REG))]
   "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
    && ix86_binary_operator_ok (AND, DImode, operands)
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(const_int 0)]
@@ -9076,7 +9076,7 @@ (define_insn "*andndi3_doubleword"
 	  (match_operand:DI 2 "nonimmediate_operand")))
    (clobber (reg:CC FLAGS_REG))]
   "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#")
 
 (define_split
@@ -9176,7 +9176,7 @@ (define_insn_and_split "*<code>di3_doubl
    (clobber (reg:CC FLAGS_REG))]
   "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
    && ix86_binary_operator_ok (<CODE>, DImode, operands)
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(const_int 0)]
@@ -9898,7 +9898,7 @@ (define_insn_and_split "*one_cmpldi2_dou
 	(not:DI (match_operand:DI 1 "nonimmediate_operand")))]
   "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
    && ix86_unary_operator_ok (NOT, DImode, operands)
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (match_dup 0)
@@ -10032,7 +10032,7 @@ (define_insn_and_split "*ashl<dwi>3_doub
 	      (match_operand:SI 3 "const_int_operand")) 0)))
    (clobber (reg:CC FLAGS_REG))]
   "(INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT)) == 0
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(parallel
@@ -10073,7 +10073,7 @@ (define_insn_and_split "*ashl<dwi>3_doub
 	    (match_operand:QI 3 "const_int_operand"))))
    (clobber (reg:CC FLAGS_REG))]
   "(INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT)) == 0
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(parallel
@@ -10228,7 +10228,7 @@ (define_insn_and_split "*ashl<mode>3_mas
   "ix86_binary_operator_ok (ASHIFT, <MODE>mode, operands)
    && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
       == GET_MODE_BITSIZE (<MODE>mode)-1
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(parallel
@@ -10250,7 +10250,7 @@ (define_insn_and_split "*ashl<mode>3_mas
   "ix86_binary_operator_ok (ASHIFT, <MODE>mode, operands)
    && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
       == GET_MODE_BITSIZE (<MODE>mode)-1
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(parallel
@@ -10748,7 +10748,7 @@ (define_insn_and_split "*<shift_insn><mo
   "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
    && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
       == GET_MODE_BITSIZE (<MODE>mode)-1
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(parallel
@@ -10770,7 +10770,7 @@ (define_insn_and_split "*<shift_insn><mo
   "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
    && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
       == GET_MODE_BITSIZE (<MODE>mode)-1
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(parallel
@@ -10791,7 +10791,7 @@ (define_insn_and_split "*<shift_insn><dw
 	      (match_operand:SI 3 "const_int_operand")) 0)))
    (clobber (reg:CC FLAGS_REG))]
   "(INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT)) == 0
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(parallel
@@ -10832,7 +10832,7 @@ (define_insn_and_split "*<shift_insn><dw
 	    (match_operand:QI 3 "const_int_operand"))))
    (clobber (reg:CC FLAGS_REG))]
   "(INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT)) == 0
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(parallel
@@ -11298,7 +11298,7 @@ (define_insn_and_split "*<rotate_insn><m
   "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
    && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
       == GET_MODE_BITSIZE (<MODE>mode)-1
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(parallel
@@ -11319,7 +11319,7 @@ (define_insn_and_split "*<rotate_insn><m
   "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
    && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
       == GET_MODE_BITSIZE (<MODE>mode)-1
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(parallel
@@ -11622,7 +11622,7 @@ (define_insn_and_split "*<btsc><mode>_ma
   "TARGET_USE_BT
    && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
       == GET_MODE_BITSIZE (<MODE>mode)-1
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(parallel
@@ -11647,7 +11647,7 @@ (define_insn_and_split "*<btsc><mode>_ma
   "TARGET_USE_BT
    && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
       == GET_MODE_BITSIZE (<MODE>mode)-1
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(parallel
@@ -11687,7 +11687,7 @@ (define_insn_and_split "*btr<mode>_mask"
   "TARGET_USE_BT
    && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
       == GET_MODE_BITSIZE (<MODE>mode)-1
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(parallel
@@ -11712,7 +11712,7 @@ (define_insn_and_split "*btr<mode>_mask_
   "TARGET_USE_BT
    && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
       == GET_MODE_BITSIZE (<MODE>mode)-1
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(parallel
@@ -11897,7 +11897,7 @@ (define_insn_and_split "*jcc_bt<mode>"
 	  && INTVAL (operands[2])
 	       >= (optimize_function_for_size_p (cfun) ? 8 : 32))
        : !memory_operand (operands[1], <MODE>mode))
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (reg:CCC FLAGS_REG)
@@ -11929,7 +11929,7 @@ (define_insn_and_split "*jcc_bt<mode>_1"
 		      (pc)))
    (clobber (reg:CC FLAGS_REG))]
   "(TARGET_USE_BT || optimize_function_for_size_p (cfun))
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (reg:CCC FLAGS_REG)
@@ -11965,7 +11965,7 @@ (define_insn_and_split "*jcc_bt<mode>_ma
   "(TARGET_USE_BT || optimize_function_for_size_p (cfun))
    && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
       == GET_MODE_BITSIZE (<MODE>mode)-1
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (reg:CCC FLAGS_REG)
@@ -14058,7 +14058,7 @@ (define_insn_and_split "*popcounthi2_1"
 	  (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand"))))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_POPCNT
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(const_int 0)]
@@ -16479,7 +16479,7 @@ (define_insn_and_split "frndintxf2_<roun
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_USE_FANCY_MATH_387
    && (flag_fp_int_builtin_inexact || !flag_trapping_math)
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(const_int 0)]
@@ -16582,7 +16582,7 @@ (define_insn_and_split "*fist<mode>2_<ro
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_USE_FANCY_MATH_387
    && flag_unsafe_math_optimizations
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(const_int 0)]
@@ -17973,7 +17973,7 @@ (define_insn_and_split "*<code><mode>3_1
 	  (match_operand:MAXMIN_IMODE 2 "nonimmediate_operand")))
    (clobber (reg:CC FLAGS_REG))]
   "(TARGET_64BIT || <MODE>mode != DImode) && TARGET_STV
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (match_dup 0)
@@ -18002,7 +18002,7 @@ (define_insn_and_split "*<code>di3_doubl
 		   (match_operand:DI 2 "nonimmediate_operand")))
    (clobber (reg:CC FLAGS_REG))]
   "!TARGET_64BIT && TARGET_STV && TARGET_AVX512VL
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (match_dup 0)
--- gcc/config/i386/sse.md.jj	2019-10-19 14:45:47.634186545 +0200
+++ gcc/config/i386/sse.md	2019-10-19 19:08:12.383359743 +0200
@@ -17363,7 +17363,7 @@ (define_insn_and_split "*sse4_1_<code>v8
 		       (const_int 4) (const_int 5)
 		       (const_int 6) (const_int 7)]))))]
   "TARGET_SSE4_1 && <mask_avx512bw_condition> && <mask_avx512vl_condition>
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (match_dup 0)
@@ -17420,7 +17420,7 @@ (define_insn_and_split "*avx2_<code>v8qi
 		       (const_int 4) (const_int 5)
 		       (const_int 6) (const_int 7)]))))]
   "TARGET_AVX2 && <mask_avx512vl_condition>
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (match_dup 0)
@@ -17469,7 +17469,7 @@ (define_insn_and_split "*sse4_1_<code>v4
 	    (parallel [(const_int 0) (const_int 1)
 		       (const_int 2) (const_int 3)]))))]
   "TARGET_SSE4_1 && <mask_avx512vl_condition>
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (match_dup 0)
@@ -17535,7 +17535,7 @@ (define_insn_and_split "*sse4_1_<code>v4
 	    (parallel [(const_int 0) (const_int 1)
 		       (const_int 2) (const_int 3)]))))]
   "TARGET_SSE4_1 && <mask_avx512vl_condition>
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (match_dup 0)
@@ -17579,7 +17579,7 @@ (define_insn_and_split "*avx512f_<code>v
 		       (const_int 2) (const_int 3)
 		       (const_int 4) (const_int 5)
 		       (const_int 6) (const_int 7)]))))]
-  "TARGET_AVX512F && can_create_pseudo_p ()"
+  "TARGET_AVX512F && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (match_dup 0)
@@ -17626,7 +17626,7 @@ (define_insn_and_split "*avx2_<code>v4qi
 	    (parallel [(const_int 0) (const_int 1)
 		       (const_int 2) (const_int 3)]))))]
   "TARGET_AVX2 && <mask_avx512vl_condition>
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (match_dup 0)
@@ -17693,7 +17693,7 @@ (define_insn_and_split "*avx2_<code>v4hi
 	    (parallel [(const_int 0) (const_int 1)
 		       (const_int 2) (const_int 3)]))))]
   "TARGET_AVX2 && <mask_avx512vl_condition>
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (match_dup 0)
@@ -17740,7 +17740,7 @@ (define_insn_and_split "*sse4_1_<code>v2
 		(const_int 1)) 0)
 	    (parallel [(const_int 0) (const_int 1)]))))]
   "TARGET_SSE4_1 && <mask_avx512vl_condition>
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (match_dup 0)
@@ -17804,7 +17804,7 @@ (define_insn_and_split "*sse4_1_<code>v2
 		(const_int 0)) 0)
 	    (parallel [(const_int 0) (const_int 1)]))))]
   "TARGET_SSE4_1 && <mask_avx512vl_condition>
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(set (match_dup 0)
@@ -18087,7 +18087,7 @@ (define_insn_and_split "sse4_2_pcmpestr"
 	   (match_dup 6)]
 	  UNSPEC_PCMPESTR))]
   "TARGET_SSE4_2
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(const_int 0)]
@@ -18223,7 +18223,7 @@ (define_insn_and_split "sse4_2_pcmpistr"
 	   (match_dup 4)]
 	  UNSPEC_PCMPISTR))]
   "TARGET_SSE4_2
-   && can_create_pseudo_p ()"
+   && ix86_pre_reload_split ()"
   "#"
   "&& 1"
   [(const_int 0)]
