| Message ID | 20191019234715.25750-7-f4bug@amsat.org |
|---|---|
| State | New |
| Headers | show |
| Series | hw/arm/raspi: Add thermal/timer, improve address space, run U-boot | expand |
On Sat, Oct 19, 2019 at 4:49 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote: > > As we are going to add more core-specific fields, add a 'cpu' > structure and move the ARMCPU field there as 'core'. > > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > hw/arm/bcm2836.c | 26 ++++++++++++++------------ > include/hw/arm/bcm2836.h | 4 +++- > 2 files changed, 17 insertions(+), 13 deletions(-) > > diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c > index 019e67b906..221ff06895 100644 > --- a/hw/arm/bcm2836.c > +++ b/hw/arm/bcm2836.c > @@ -51,8 +51,9 @@ static void bcm2836_init(Object *obj) > int n; > > for (n = 0; n < BCM283X_NCPUS; n++) { > - object_initialize_child(obj, "cpu[*]", &s->cpus[n], sizeof(s->cpus[n]), > - info->cpu_type, &error_abort, NULL); > + object_initialize_child(obj, "cpu[*]", &s->cpu[n].core, > + sizeof(s->cpu[n].core), info->cpu_type, > + &error_abort, NULL); > } > > sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control), > @@ -122,10 +123,10 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) > > for (n = 0; n < BCM283X_NCPUS; n++) { > /* TODO: this should be converted to a property of ARM_CPU */ > - s->cpus[n].mp_affinity = (info->clusterid << 8) | n; > + s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n; > > /* set periphbase/CBAR value for CPU-local registers */ > - object_property_set_int(OBJECT(&s->cpus[n]), > + object_property_set_int(OBJECT(&s->cpu[n].core), > info->peri_base, > "reset-cbar", &err); > if (err) { > @@ -134,14 +135,15 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) > } > > /* start powered off if not enabled */ > - object_property_set_bool(OBJECT(&s->cpus[n]), n >= s->enabled_cpus, > + object_property_set_bool(OBJECT(&s->cpu[n].core), n >= s->enabled_cpus, > "start-powered-off", &err); > if (err) { > error_propagate(errp, err); > return; > } > > - object_property_set_bool(OBJECT(&s->cpus[n]), true, "realized", &err); > + object_property_set_bool(OBJECT(&s->cpu[n].core), true, > + "realized", &err); > if (err) { > error_propagate(errp, err); > return; > @@ -149,18 +151,18 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) > > /* Connect irq/fiq outputs from the interrupt controller. */ > qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n, > - qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_IRQ)); > + qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_IRQ)); > qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n, > - qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_FIQ)); > + qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_FIQ)); > > /* Connect timers from the CPU to the interrupt controller */ > - qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_PHYS, > + qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_PHYS, > qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n)); > - qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_VIRT, > + qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_VIRT, > qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n)); > - qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_HYP, > + qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_HYP, > qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n)); > - qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_SEC, > + qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_SEC, > qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n)); > } > } > diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h > index 97187f72be..92a6544816 100644 > --- a/include/hw/arm/bcm2836.h > +++ b/include/hw/arm/bcm2836.h > @@ -35,7 +35,9 @@ typedef struct BCM283XState { > char *cpu_type; > uint32_t enabled_cpus; > > - ARMCPU cpus[BCM283X_NCPUS]; > + struct { > + ARMCPU core; > + } cpu[BCM283X_NCPUS]; > BCM2836ControlState control; > BCM2835PeripheralState peripherals; > } BCM283XState; > -- > 2.21.0 > >
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index 019e67b906..221ff06895 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm2836.c @@ -51,8 +51,9 @@ static void bcm2836_init(Object *obj) int n; for (n = 0; n < BCM283X_NCPUS; n++) { - object_initialize_child(obj, "cpu[*]", &s->cpus[n], sizeof(s->cpus[n]), - info->cpu_type, &error_abort, NULL); + object_initialize_child(obj, "cpu[*]", &s->cpu[n].core, + sizeof(s->cpu[n].core), info->cpu_type, + &error_abort, NULL); } sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control), @@ -122,10 +123,10 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) for (n = 0; n < BCM283X_NCPUS; n++) { /* TODO: this should be converted to a property of ARM_CPU */ - s->cpus[n].mp_affinity = (info->clusterid << 8) | n; + s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n; /* set periphbase/CBAR value for CPU-local registers */ - object_property_set_int(OBJECT(&s->cpus[n]), + object_property_set_int(OBJECT(&s->cpu[n].core), info->peri_base, "reset-cbar", &err); if (err) { @@ -134,14 +135,15 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) } /* start powered off if not enabled */ - object_property_set_bool(OBJECT(&s->cpus[n]), n >= s->enabled_cpus, + object_property_set_bool(OBJECT(&s->cpu[n].core), n >= s->enabled_cpus, "start-powered-off", &err); if (err) { error_propagate(errp, err); return; } - object_property_set_bool(OBJECT(&s->cpus[n]), true, "realized", &err); + object_property_set_bool(OBJECT(&s->cpu[n].core), true, + "realized", &err); if (err) { error_propagate(errp, err); return; @@ -149,18 +151,18 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) /* Connect irq/fiq outputs from the interrupt controller. */ qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n, - qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_IRQ)); + qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_IRQ)); qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n, - qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_FIQ)); + qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_FIQ)); /* Connect timers from the CPU to the interrupt controller */ - qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_PHYS, + qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_PHYS, qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n)); - qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_VIRT, + qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_VIRT, qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n)); - qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_HYP, + qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_HYP, qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n)); - qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_SEC, + qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_SEC, qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n)); } } diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h index 97187f72be..92a6544816 100644 --- a/include/hw/arm/bcm2836.h +++ b/include/hw/arm/bcm2836.h @@ -35,7 +35,9 @@ typedef struct BCM283XState { char *cpu_type; uint32_t enabled_cpus; - ARMCPU cpus[BCM283X_NCPUS]; + struct { + ARMCPU core; + } cpu[BCM283X_NCPUS]; BCM2836ControlState control; BCM2835PeripheralState peripherals; } BCM283XState;
As we are going to add more core-specific fields, add a 'cpu' structure and move the ARMCPU field there as 'core'. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- hw/arm/bcm2836.c | 26 ++++++++++++++------------ include/hw/arm/bcm2836.h | 4 +++- 2 files changed, 17 insertions(+), 13 deletions(-)