| Submitter | Alexander Graf |
|---|---|
| Date | Oct. 6, 2011, 8:05 a.m. |
| Message ID | <1317888366-10509-9-git-send-email-agraf@suse.de> |
| Download | mbox | patch |
| Permalink | /patch/117956/ |
| State | New |
| Headers | show |
Comments
Patch
diff --git a/hw/openpic.c b/hw/openpic.c index 9710ac0..31ad175 100644 --- a/hw/openpic.c +++ b/hw/openpic.c @@ -1299,6 +1299,10 @@ static void mpic_reset (void *opaque) mpp->src[i].ipvp = 0x80800000; mpp->src[i].ide = 0x00000001; } + /* Set IDE for IPIs to 0 so we don't get spurious interrupts */ + for (i = mpp->irq_ipi0; i < (mpp->irq_ipi0 + MAX_IPI); i++) { + mpp->src[i].ide = 0; + } /* Initialise IRQ destinations */ for (i = 0; i < MAX_CPU; i++) { mpp->dst[i].pctp = 0x0000000F;
We use the IDE register with IPIs as a mask to keep track which processors have already acknowledged the respective interrupt. So we need to initialize it to 0 to make sure that it doesn't accidently fire an IPI on CPU0 when the first IPI is triggered. Reported-by: Elie Richa <richa@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de> --- v2 -> v3: - fix IDE IPI reset --- hw/openpic.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)