From patchwork Thu Oct 6 05:45:24 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiko Schocher X-Patchwork-Id: 117950 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 83546B708F for ; Thu, 6 Oct 2011 16:45:57 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 971E228CA9; Thu, 6 Oct 2011 07:45:53 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id br6hAggNxG59; Thu, 6 Oct 2011 07:45:53 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6435228CA3; Thu, 6 Oct 2011 07:45:51 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6193C28CA3 for ; Thu, 6 Oct 2011 07:45:49 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id n37LFyptWoPw for ; Thu, 6 Oct 2011 07:45:48 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from pollux.denx.de (host-82-135-33-74.customer.m-online.net [82.135.33.74]) by theia.denx.de (Postfix) with ESMTP id B4FBB28CA2 for ; Thu, 6 Oct 2011 07:45:46 +0200 (CEST) Received: by pollux.denx.de (Postfix, from userid 515) id 5BC261091; Thu, 6 Oct 2011 07:45:46 +0200 (CEST) From: Heiko Schocher To: u-boot@lists.denx.de Date: Thu, 6 Oct 2011 07:45:24 +0200 Message-Id: <1317879924-18266-1-git-send-email-hs@denx.de> X-Mailer: git-send-email 1.7.6.2 In-Reply-To: <1317824907-8693-1-git-send-email-hs@denx.de> References: <1317824907-8693-1-git-send-email-hs@denx.de> Cc: Scott Wood , Heiko Schocher Subject: [U-Boot] [PATCH 05/10 v3] spl, nand: add 4bit HW ecc oob first nand_read_page function X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de similiar to commit dc7cd8e59ba077f3b4c1a4557c9cd86a31b9ab1f, only adapted for the new spl framework. Signed-off-by: Heiko Schocher Cc: Scott Wood Cc: Albert ARIBAUD Cc: Sandeep Paulraj --- changes for v3: - add comment from Scott Wood: as BSS is cleared, no need for intializing vars with 0 remove this. drivers/mtd/nand/nand_spl_simple.c | 43 +++++++++++++++++++++++++++++++++++- 1 files changed, 42 insertions(+), 1 deletions(-) diff --git a/drivers/mtd/nand/nand_spl_simple.c b/drivers/mtd/nand/nand_spl_simple.c index 71491d4..622a9b5 100644 --- a/drivers/mtd/nand/nand_spl_simple.c +++ b/drivers/mtd/nand/nand_spl_simple.c @@ -140,6 +140,47 @@ static int nand_is_bad_block(int block) return 0; } +#if defined(CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST) +static int nand_read_page(int block, int page, uchar *dst) +{ + struct nand_chip *this = mtd.priv; + u_char *ecc_calc; + u_char *ecc_code; + u_char *oob_data; + int i; + int eccsize = CONFIG_SYS_NAND_ECCSIZE; + int eccbytes = CONFIG_SYS_NAND_ECCBYTES; + int eccsteps = CONFIG_SYS_NAND_ECCSTEPS; + uint8_t *p = dst; + int stat; + + /* + * No malloc available for now, just use some temporary locations + * in SDRAM + */ + ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000); + ecc_code = ecc_calc + 0x100; + oob_data = ecc_calc + 0x200; + + nand_command(block, page, 0, NAND_CMD_READOOB); + this->read_buf(&mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE); + nand_command(block, page, 0, NAND_CMD_READ0); + + /* Pick the ECC bytes out of the oob data */ + for (i = 0; i < CONFIG_SYS_NAND_ECCTOTAL; i++) + ecc_code[i] = oob_data[nand_ecc_pos[i]]; + + + for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { + this->ecc.hwctl(&mtd, NAND_ECC_READ); + this->read_buf(&mtd, p, eccsize); + this->ecc.calculate(&mtd, p, &ecc_calc[i]); + stat = this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]); + } + + return 0; +} +#else static int nand_read_page(int block, int page, void *dst) { struct nand_chip *this = mtd.priv; @@ -186,6 +227,7 @@ static int nand_read_page(int block, int page, void *dst) return 0; } +#endif int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst) { @@ -230,7 +272,6 @@ void nand_init(void) mtd.priv = &nand_chip; nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE; - nand_chip.options = 0; board_nand_init(&nand_chip); if (nand_chip.select_chip)