diff mbox series

[U-Boot,4/6] armv8: fsl-layerscape: add missing SATA3 and SATA4 base addresses

Message ID 20191017092144.19525-4-laurentiu.tudor@nxp.com
State Superseded
Delegated to: Priyanka Jain
Headers show
Series [U-Boot,1/6] armv8: fsl-layerscape: guard caam specific defines | expand

Commit Message

Laurentiu Tudor Oct. 17, 2019, 9:22 a.m. UTC 
From: Laurentiu Tudor <laurentiu.tudor@nxp.com>

There are chips that have 4 sata controllers. Add missing base
addresses for SATA3 and SATA4.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
---
 arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 2 ++
 1 file changed, 2 insertions(+)

Comments

Priyanka Jain Oct. 18, 2019, 6:22 a.m. UTC | #1 
>-----Original Message-----
>From: u-boot-bounces@linux.nxdi.nxp.com <u-boot-
>bounces@linux.nxdi.nxp.com> On Behalf Of Laurentiu Tudor
>Sent: Thursday, October 17, 2019 2:52 PM
>To: u-boot@lists.denx.de; Prabhakar X <prabhakar.kushwaha@nxp.com>
>Subject: [u-boot] [PATCH 4/6] armv8: fsl-layerscape: add missing SATA3 and
>SATA4 base addresses
Is "missing" string required in subject?
>
>From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
>
>There are chips that have 4 sata controllers. Add missing base addresses for
>SATA3 and SATA4.
>
Which chips? Please mention

>Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
>---

<snip>
--priyankajain
diff mbox series

Patch

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 4f050470dd..0e4bf331fd 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -87,6 +87,8 @@ 
 /* SATA */
 #define AHCI_BASE_ADDR1				(CONFIG_SYS_IMMR + 0x02200000)
 #define AHCI_BASE_ADDR2				(CONFIG_SYS_IMMR + 0x02210000)
+#define AHCI_BASE_ADDR3				(CONFIG_SYS_IMMR + 0x02220000)
+#define AHCI_BASE_ADDR4				(CONFIG_SYS_IMMR + 0x02230000)
 
 /* QDMA */
 #define QDMA_BASE_ADDR				(CONFIG_SYS_IMMR + 0x07380000)