| Message ID | 1317763491-7274-3-git-send-email-robotboy@chromium.org |
|---|---|
| State | Changes Requested |
| Headers | show |
Acked-by: Mike Frysinger <vapier@gentoo.org>
-mike
Dear Anton Staaf, In message <1317763491-7274-3-git-send-email-robotboy@chromium.org> you wrote: > CONFIG_SYS_CACHELINE_SIZE is supposed to be defined for all > configs. But most configs do not specify it. This patch > will set CONFIG_SYS_CACHELINE_SIZE to a default value equal > to the GCC builtin macro __BIGGEST_ALIGNMENT__. This is not > strictly correct, so it also generates a warning if the > default is used. > > Signed-off-by: Anton Staaf <robotboy@chromium.org> > Cc: Lukasz Majewski <l.majewski@samsung.com> > Cc: Kyungmin Park <kyungmin.park@samsung.com> > Cc: Mike Frysinger <vapier@gentoo.org> > Cc: Aneesh V <aneesh@ti.com> > Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> > > --- > > Changes for v2: > - Add comment describing why we are setting a default cacheline size > > include/common.h | 14 ++++++++++++++ > 1 files changed, 14 insertions(+), 0 deletions(-) Applied, thanks. Best regards, Wolfgang Denk
diff --git a/include/common.h b/include/common.h index cdd76c5..d50b182 100644 --- a/include/common.h +++ b/include/common.h @@ -790,6 +790,20 @@ int cpu_release(int nr, int argc, char * const argv[]); #define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) /* + * All configurations should provide a value for their architectures cacheline + * size. Most currently do not and thus we provide a default that will surely + * be wrong, and a warning that we have done so. + * + * An additional run time warning will be generated when the incorrect size + * is used to align a DMA buffer and the cache invalidation or flushing + * routines are called with the resulting incorrectly aligned address. + */ +#if !defined(CONFIG_SYS_CACHELINE_SIZE) +#warning CONFIG_SYS_CACHELINE_SIZE not defined, using __BIGGEST_ALIGNMENT__ +#define CONFIG_SYS_CACHELINE_SIZE __BIGGEST_ALIGNMENT__ +#endif + +/* * The ALLOC_CACHE_ALIGN_BUFFER macro is used to allocate a cache line size * aligned buffer on the stack. Such a buffer is useful for DMA operations * where flushing and invalidating the cache before and after a read and/or
CONFIG_SYS_CACHELINE_SIZE is supposed to be defined for all configs. But most configs do not specify it. This patch will set CONFIG_SYS_CACHELINE_SIZE to a default value equal to the GCC builtin macro __BIGGEST_ALIGNMENT__. This is not strictly correct, so it also generates a warning if the default is used. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Aneesh V <aneesh@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> --- Changes for v2: - Add comment describing why we are setting a default cacheline size include/common.h | 14 ++++++++++++++ 1 files changed, 14 insertions(+), 0 deletions(-)