Explicitly record which registers are inaccessible

Richard Sandiford <richard.sandiford@linaro.org> writes:
> Bernd Schmidt <bernds@codesourcery.com> writes:
>> On 09/25/11 19:16, Richard Sandiford wrote:
>>> The last bit is indirect, via a new HARD_REG_SET called operand_reg_set.
>>> And this set is the reason why I'm sending the patch now.  The MIPS16 port
>>> has always had a problem with the HI and LO registers: they can only be
>>> set by multiplication and division instructions, and only read by MFHI
>>> and MFLO.  Unlike normal MIPS, there are no MTHI and MTLO instructions.
>> [...]
>>  >  Now that we use pressure classes
>>> instead (a good thing), I'm finally going to try to fix this "properly".
>>> And that means (a) fixing HI and LO and (b) stopping them from being
>>> treated as register operands.  (b) is important because if we start
>>> out with this (valid) instruction before reload:
>>
>> The only slightly nonobvious thing about this is that mfhi/mflo can't
>> have their operand represented using a register_operand. I haven't
>> looked; I assume that's the case. Ok.
>
> Right.  The follow-up MIPS patch (which I've been sitting on, I suppose
> I should post it when I get home, sorry) removes HI and LO from the new
> operand_reg_set and extends move_operand to explicitly allow LO.
>
> A lot of the multiplication patterns need rejigging to expose LO early
> when required, so it's not pretty...

Here it is.  Like I say, most of it is just exposing LO at expand time
for MIPS16, while not affecting normal mode.  The changes relevant to
this patch are the ones to use muldiv_target_operand and the change
to move_operand.

Richard

gcc/
	* config/mips/mips-protos.h (mips_emit_binary): Declare.
	* config/mips/mips.c (mips_emit_binary): Make global.
	(mips_set_mips16_mode): Turn off -mfix-r4000 in MIPS16 mode.
	(mips_conditional_register_usage): Don't treat LO and HI as
	register operands in MIPS16 mode.
	(mips_mulsidi3_gen_fn): Use {u,}mulsidi3_{32,64}bit_mips16
	for MIPS16 code.
	* config/mips/predicates.md (muldiv_target_operand): New predicate.
	(move_operand): Allow hilo_operand.
	* config/mips/mips.md (mul<mode>3): Explicitly specify LO as the
	target of MIPS16 multiplies, then move it into the target register.
	(mul<mode>3_internal, *macc2, *msac2): Use muldiv_target_operand.
	(<u>mulsidi3_32bit_mips16): New expander.
	(<u>mulsidi3_32bit): Use muldiv_target_operand.
	(<u>mulsidi3_32bit_r4000): Disable for ISA_HAS_DSP.
	(<u>mulsidi3_64bit): Require !TARGET_MIPS16.  Split into
	<u>mulsidi3_64bit_split.
	(<u>mulsidi3_64bit_mips16): New expander.
	(<u>mulsidi3_64bit_split): Likewise, using expansions from
	two previous define_splits.
	(<u>mulsidi3_64bit_hilo, *muls<u>_di, <u>msubsidi4): Use
	muldiv_target_operand.
	(<su>mulsi3_highpart): Use <su>mulsi3_highpart_split for MIPS16 code.
	(<su>mulsi3_highpart_internal): Require !TARGET_MIPS16.
	Split into <su>mulsi3_highpart_split.
	(<su>mulsi3_highpart_split): New expander.
	(<su>muldi3_highpart): Turn into a define_expand.
	Use <su>muldi3_highpart_split for MIPS16 code.
	(<su>muldi3_highpart_internal): Renamed from <su>muldi3_highpart.
	Require !TARGET_MIPS16.  Split into <su>muldi3_highpart_split.
	(<su>muldi3_highpart_split): New expander.
	(<u>mulditi3): Explicitly specify LO as the target of MIPS16
	multiplies, then move it into the target register.
	(<u>mulditi3_internal, <u>maddsidi4): Use muldiv_target_operand.
	(divmod<mode>4, udivmod<mode>4): Turn into define_expands.
	Use <u>divmod<mode>4_split for MIPS16 code, then explicitly
	move LO into operand 0.
	(divmod<mode>4_internal, udivmod<mode>4_internal): Renamed
	from <u>divmod<mode>4.  Use muldiv_target_operand.
	Require !TARGET_MIPS16.  Split into <u>divmod<mode>4_split.
	(<u>divmod<mode>4_split): New expander.
	(<u>divmod<GPR:mode>4_hilo_<HILO:mode>): Use muldiv_target_operand.
	(mfhi<GPR:mode>_<HILO:mode>): Use hilo_operand.

gcc/testsuite/
	* gcc.target/mips/mult-2.c, gcc.target/mips/mult-3.c,
	gcc.target/mips/mult-4.c, gcc.target/mips/mult-5.c,
	gcc.target/mips/mult-6.c, gcc.target/mips/mult-7.c,
	gcc.target/mips/mult-8.c, gcc.target/mips/mult-9.c,
	gcc.target/mips/mult-10.c, gcc.target/mips/mult-11.c,
	gcc.target/mips/mult-12.c, gcc.target/mips/mult-13.c,
	gcc.target/mips/mult-14.c, gcc.target/mips/mult-15.c,
	gcc.target/mips/mult-16.c, gcc.target/mips/mult-17.c,
	gcc.target/mips/mult-18.c, gcc.target/mips/mult-19.c,
	gcc.target/mips/div-1.c, gcc.target/mips/div-2.c,
	gcc.target/mips/div-3.c, gcc.target/mips/div-4.c,
	gcc.target/mips/div-5.c, gcc.target/mips/div-6.c,
	gcc.target/mips/div-7.c, gcc.target/mips/div-8.c,
	gcc.target/mips/div-9.c, gcc.target/mips/div-10.c,
	gcc.target/mips/div-11.c, gcc.target/mips/div-12.c: New tests.
	* gcc.target/mips/fix-r4000-1.c (foo, bar): Add NOMIPS16.
	* gcc.target/mips/fix-r4000-2.c (foo): Likewise.
	* gcc.target/mips/fix-r4000-3.c (foo): Likewise.
	* gcc.target/mips/fix-r4000-4.c (foo): Likewise.
	* gcc.target/mips/fix-r4000-5.c (foo): Likewise.
	* gcc.target/mips/fix-r4000-6.c (foo): Likewise.
	* gcc.target/mips/fix-r4000-7.c (foo): Likewise.
	* gcc.target/mips/fix-r4000-8.c (foo): Likewise.
	* gcc.target/mips/fix-r4000-9.c (foo): Likewise.
	* gcc.target/mips/fix-r4000-10.c (foo): Likewise.
	* gcc.target/mips/fix-r4000-11.c (foo): Likewise.
	* gcc.target/mips/fix-r4000-12.c (foo): Likewise.

Explicitly record which registers are inaccessible

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