| Message ID | 20191014071518.11923-2-Mark-MC.Lee@mediatek.com |
|---|---|
| State | Accepted |
| Delegated to: | David Miller |
| Headers | show |
| Series | Update MT7629 to support PHYLINK API | expand |
On Mon, 14 Oct 2019 15:15:17 +0800, MarkLee wrote: > In the original design, mtk_phy_connect function will set ge_mode=1 > if phy-mode is GMII(PHY_INTERFACE_MODE_GMII) and then set the correct > ge_mode to ETHSYS_SYSCFG0 register. This logic was broken after apply > mediatek PHYLINK patch(Fixes tag), the new mtk_mac_config function will > not set ge_mode=1 for GMII mode hence the final ETHSYS_SYSCFG0 setting > will be incorrect for mt7629 GMII mode. This patch add the missing logic > back to fix it. > > Fixes: b8fc9f30821e ("net: ethernet: mediatek: Add basic PHYLINK support") > Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com> LGTM, thanks
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c index c61069340f4f..703adb96429e 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c @@ -261,6 +261,7 @@ static void mtk_mac_config(struct phylink_config *config, unsigned int mode, ge_mode = 0; switch (state->interface) { case PHY_INTERFACE_MODE_MII: + case PHY_INTERFACE_MODE_GMII: ge_mode = 1; break; case PHY_INTERFACE_MODE_REVMII:
In the original design, mtk_phy_connect function will set ge_mode=1 if phy-mode is GMII(PHY_INTERFACE_MODE_GMII) and then set the correct ge_mode to ETHSYS_SYSCFG0 register. This logic was broken after apply mediatek PHYLINK patch(Fixes tag), the new mtk_mac_config function will not set ge_mode=1 for GMII mode hence the final ETHSYS_SYSCFG0 setting will be incorrect for mt7629 GMII mode. This patch add the missing logic back to fix it. Fixes: b8fc9f30821e ("net: ethernet: mediatek: Add basic PHYLINK support") Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com> -- v2->v3: * no change v1->v2: * no change --- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 1 + 1 file changed, 1 insertion(+)