From patchwork Tue Oct 4 09:28:19 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerald Pfeifer X-Patchwork-Id: 117596 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 89895B6F64 for ; Tue, 4 Oct 2011 20:28:50 +1100 (EST) Received: (qmail 29848 invoked by alias); 4 Oct 2011 09:28:46 -0000 Received: (qmail 29838 invoked by uid 22791); 4 Oct 2011 09:28:45 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL,BAYES_00,TW_AV X-Spam-Check-By: sourceware.org Received: from ainaz.pair.com (HELO ainaz.pair.com) (209.68.2.66) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 04 Oct 2011 09:28:31 +0000 Received: from ip-2-205-213-219.web.vodafone.de (ip-2-205-213-219.web.vodafone.de [2.205.213.219]) by ainaz.pair.com (Postfix) with ESMTPSA id B2A7A3F40F; Tue, 4 Oct 2011 05:28:25 -0400 (EDT) Date: Tue, 4 Oct 2011 11:28:19 +0200 (CEST) From: Gerald Pfeifer To: "H.J. Lu" cc: Kirill Yukhin , gcc-patches List , Uros Bizjak Subject: Re: [wwwdocs] IA-32/x86-64 Changes for upcoming 4.7.0 series In-Reply-To: Message-ID: References: MIME-Version: 1.0 X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org On Mon, 3 Oct 2011, H.J. Lu wrote: > I checked it in. Thanks, H.J. This needed a small markup fix which I just applied; see below. Gerald Index: changes.html =================================================================== RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.7/changes.html,v retrieving revision 1.43 diff -u -r1.43 changes.html --- changes.html 3 Oct 2011 19:38:23 -0000 1.43 +++ changes.html 4 Oct 2011 09:27:15 -0000 @@ -407,9 +407,9 @@
  • Support for new Intel rdrnd instruction is available via -mrdrnd.
  • Two additional AVX vector conversion instructions are available via -mf16c.
  • Support for new Intel processor codename IvyBridge with RDRND, FSGSBASE and F16C - is available through -march=core-avx-i. + is available through -march=core-avx-i.
  • Support for the new Intel processor codename Haswell with AVX2, FMA, BMI, - BMI2, LZCNT is available through -march=core-avx2. + BMI2, LZCNT is available through -march=core-avx2.
  • ...