| Submitter | Blue Swirl |
|---|---|
| Date | Oct. 2, 2011, 6:44 p.m. |
| Message ID | <CAAu8pHvmKJh-OHZP+K6PtLJ3hrqDcK16b54u5bCrbWicggH4wQ@mail.gmail.com> |
| Download | mbox | patch |
| Permalink | /patch/117359/ |
| State | New |
| Headers | show |
Comments
On 2 October 2011 19:44, Blue Swirl <blauwirbel@gmail.com> wrote: > Bah, bug in bccd9ec5f098668576342c83d90d6d6833d61d33, > target-arm/op_helper.c missed this change unlike all other targets: > diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c > index ab9c923..1892b35 100644 > --- a/target-arm/op_helper.c > +++ b/target-arm/op_helper.c > @@ -84,6 +84,7 @@ void tlb_fill(CPUState *env1, target_ulong addr, int > is_write, int mmu_idx, > int ret; > > saved_env = env; > + env = env1; > ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx); > if (unlikely(ret)) { > if (retaddr) { > This fixes the segfault for me. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> -- PMM
On Wed, Oct 5, 2011 at 1:22 PM, Peter Maydell <peter.maydell@linaro.org> wrote: > On 2 October 2011 19:44, Blue Swirl <blauwirbel@gmail.com> wrote: >> Bah, bug in bccd9ec5f098668576342c83d90d6d6833d61d33, >> target-arm/op_helper.c missed this change unlike all other targets: >> diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c >> index ab9c923..1892b35 100644 >> --- a/target-arm/op_helper.c >> +++ b/target-arm/op_helper.c >> @@ -84,6 +84,7 @@ void tlb_fill(CPUState *env1, target_ulong addr, int >> is_write, int mmu_idx, >> int ret; >> >> saved_env = env; >> + env = env1; >> ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx); >> if (unlikely(ret)) { >> if (retaddr) { >> > > This fixes the segfault for me. > > Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Thanks for the review, applied.
Patch
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index ab9c923..1892b35 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -84,6 +84,7 @@ void tlb_fill(CPUState *env1, target_ulong addr, int is_write, int mmu_idx, int ret; saved_env = env; + env = env1; ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx); if (unlikely(ret)) {