From patchwork Sun Oct 2 16:10:20 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Herv=C3=A9_Poussineau?= X-Patchwork-Id: 117346 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 6B7B3B6F7B for ; Mon, 3 Oct 2011 04:15:59 +1100 (EST) Received: from localhost ([::1]:33062 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RAOdG-0006QB-Fj for incoming@patchwork.ozlabs.org; Sun, 02 Oct 2011 12:11:14 -0400 Received: from eggs.gnu.org ([140.186.70.92]:54378) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RAOd2-0005tz-UC for qemu-devel@nongnu.org; Sun, 02 Oct 2011 12:11:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RAOd1-0008Bm-Kd for qemu-devel@nongnu.org; Sun, 02 Oct 2011 12:11:00 -0400 Received: from smtp5-g21.free.fr ([212.27.42.5]:46337) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RAOd1-0008BK-33 for qemu-devel@nongnu.org; Sun, 02 Oct 2011 12:10:59 -0400 Received: from localhost.localdomain (unknown [88.171.126.33]) by smtp5-g21.free.fr (Postfix) with ESMTP id C9506D4827C; Sun, 2 Oct 2011 18:10:53 +0200 (CEST) From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= To: qemu-devel@nongnu.org Date: Sun, 2 Oct 2011 18:10:20 +0200 Message-Id: <1317571828-9059-9-git-send-email-hpoussin@reactos.org> X-Mailer: git-send-email 1.7.6.3 In-Reply-To: <1317571828-9059-1-git-send-email-hpoussin@reactos.org> References: <1317571828-9059-1-git-send-email-hpoussin@reactos.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 212.27.42.5 Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Subject: [Qemu-devel] [PATCH v3 08/16] malta: improve bus implementation of PIIX4 bridge X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Hervé Poussineau --- hw/mips_malta.c | 4 +--- hw/pc.h | 2 +- hw/piix4.c | 37 +++++++++++++++++++++++++++++++++++-- 3 files changed, 37 insertions(+), 6 deletions(-) diff --git a/hw/mips_malta.c b/hw/mips_malta.c index 1ec1228..67e666d 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -943,13 +943,11 @@ void mips_malta_init (ram_addr_t ram_size, /* Southbridge */ ide_drive_get(hd, MAX_IDE_BUS); - piix4_devfn = piix4_init(pci_bus, 80); - /* Interrupt controller */ /* The 8259 is attached to the MIPS CPU INT0 pin, ie interrupt 2 */ i8259 = i8259_init(env->irq[2]); + piix4_devfn = piix4_init(pci_bus, 80, i8259); - isa_bus_irqs(i8259); pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1); usb_uhci_piix4_init(pci_bus, piix4_devfn + 2); smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_get_irq(9), diff --git a/hw/pc.h b/hw/pc.h index 746973f..df7d86a 100644 --- a/hw/pc.h +++ b/hw/pc.h @@ -194,7 +194,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, /* piix4.c */ extern PCIDevice *piix4_dev; -int piix4_init(PCIBus *bus, int devfn); +int piix4_init(PCIBus *bus, int devfn, qemu_irq *isa_irqs); /* vga.c */ enum vga_retrace_method { diff --git a/hw/piix4.c b/hw/piix4.c index 9addaae..ce11ef4 100644 --- a/hw/piix4.c +++ b/hw/piix4.c @@ -27,11 +27,14 @@ #include "pci.h" #include "isa.h" #include "sysbus.h" +#include "exec-memory.h" PCIDevice *piix4_dev; typedef struct PIIX4State { PCIDevice dev; + ISABus bus; + qemu_irq *isa_irq; } PIIX4State; static void piix4_reset(void *opaque) @@ -83,21 +86,51 @@ static const VMStateDescription vmstate_piix4 = { } }; +static qemu_irq pci_piix4_get_irq(ISABus *bus, int isairq) +{ + PIIX4State *s = container_of(bus, PIIX4State, bus); + if (isairq < 0 || isairq >= 16) { + hw_error("isa irq %d invalid", isairq); + } + return s->isa_irq[isairq]; +} + +static MemoryRegion *pci_piix4_get_io_space(ISABus *bus) +{ + PIIX4State *s = container_of(bus, PIIX4State, bus); + return pci_address_space_io(&s->dev); +} + +static MemoryRegion *pci_piix4_get_memory_space(ISABus *bus) +{ + return get_system_memory(); +} + +static ISABusOps pci_piix4_ops = { + .get_irq = pci_piix4_get_irq, + .get_io_space = pci_piix4_get_io_space, + .get_memory_space = pci_piix4_get_memory_space, +}; + static int piix4_initfn(PCIDevice *dev) { PIIX4State *d = DO_UPCAST(PIIX4State, dev, dev); - isa_bus_bridge_init(&d->dev.qdev, pci_address_space_io(dev)); + isa_bus_new(&d->bus, &pci_piix4_ops, &d->dev.qdev); piix4_dev = &d->dev; qemu_register_reset(piix4_reset, d); return 0; } -int piix4_init(PCIBus *bus, int devfn) +int piix4_init(PCIBus *bus, int devfn, qemu_irq *isa_irqs) { PCIDevice *d; + PIIX4State *s; d = pci_create_simple_multifunction(bus, devfn, true, "PIIX4"); + s = DO_UPCAST(PIIX4State, dev, d); + s->isa_irq = isa_irqs; + return d->devfn; }