From patchwork Mon Oct 7 10:25:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 1172696 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=st.com header.i=@st.com header.b="Q2KN9UBX"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46mxTz3nl0z9sPJ for ; Mon, 7 Oct 2019 21:26:31 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727589AbfJGK0Y (ORCPT ); Mon, 7 Oct 2019 06:26:24 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:51126 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726010AbfJGK0Q (ORCPT ); Mon, 7 Oct 2019 06:26:16 -0400 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x97AL5S7020066; Mon, 7 Oct 2019 12:25:56 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=M74aio4f0hcIb5CStKqLwZ4Znh93MbF0U0WtdJoeBBo=; b=Q2KN9UBXXxl2ohKocVXHND/laavGfATGspsUy9pU0HAcSp3+DeRmBYXG++qFT6I8EWta TVHFeTG0EScwA25a3e+YQgWsQrIbsntu9C1rPLjPjoyx5eawmNn3WbFzgkkkr8iXOxjz jw5XD82oPppZiW8SgbaaBxw3y5FRE63xXNobM/bgpbu66ySDwi/Y2Qie6+Abjic9f45z xqP6bbvHhr0V5VrskG1Kh/sSjJQIqETDYokF+mAjcC3PCC05WjCqK24MSigXbWWCH3ff wa0FMTbXuxNmdL3ynz439jX6yPRu1LN05zOXg52LnrDmzVraEhqf/ZxPMVmpppcsQyXB tQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2vej2p1s5j-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 07 Oct 2019 12:25:56 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 476A7100034; Mon, 7 Oct 2019 12:25:56 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 2F2572BFE0A; Mon, 7 Oct 2019 12:25:56 +0200 (CEST) Received: from localhost (10.75.127.51) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 7 Oct 2019 12:25:55 +0200 From: Alexandre Torgue To: Maxime Ripard , Mauro Carvalho Chehab , Rob Herring , Mark Rutland , Chen-Yu Tsai , Alexandru Ardelean , Liam Girdwood , Mark Brown CC: , , , Alexandre Torgue , , Subject: [PATCH 2/3] dt-bindings: net: adi: Fix yaml verification issue Date: Mon, 7 Oct 2019 12:25:51 +0200 Message-ID: <20191007102552.19808-3-alexandre.torgue@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191007102552.19808-1-alexandre.torgue@st.com> References: <20191007102552.19808-1-alexandre.torgue@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG6NODE1.st.com (10.75.127.16) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-07_02:2019-10-07,2019-10-07 signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This commit fixes an issue seen during yaml check ("make dt_binding_check"). Each enum were not declared as uint32. "Documentation/devicetree/bindings/net/adi,adin.yaml: properties:adi,rx-internal-delay-ps: ..., 'enum': [1600, 1800, 2000, 2200, 2400], 'default': 2000} is not valid under any of the given schemas" Fixes: 767078132ff9 ("dt-bindings: net: add bindings for ADIN PHY driver") Signed-off-by: Alexandre Torgue diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml index d95cc691a65f..23e8597acda6 100644 --- a/Documentation/devicetree/bindings/net/adi,adin.yaml +++ b/Documentation/devicetree/bindings/net/adi,adin.yaml @@ -17,6 +17,8 @@ allOf: properties: adi,rx-internal-delay-ps: + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" description: | RGMII RX Clock Delay used only when PHY operates in RGMII mode with internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds. @@ -24,6 +26,8 @@ properties: default: 2000 adi,tx-internal-delay-ps: + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" description: | RGMII TX Clock Delay used only when PHY operates in RGMII mode with internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds. @@ -31,6 +35,8 @@ properties: default: 2000 adi,fifo-depth-bits: + allOf: + - $ref: "/schemas/types.yaml#/definitions/uint32" description: | When operating in RMII mode, this option configures the FIFO depth. enum: [ 4, 8, 12, 16, 20, 24 ]