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, V4, patch #14 [part of patch #4.2], Update vector 128-bit instruction sizes

Message ID 20191004125552.GF561@ibm-tinman.the-meissners.org
State New
Headers show
Series , V4, patch #14 [part of patch #4.2], Update vector 128-bit instruction sizes | expand

Commit Message

Michael Meissner Oct. 4, 2019, 12:55 p.m. UTC 
I was asked to split V4 patch #4.2 into smaller chuncks.  This patch is one of
8 patches that were broken out from 4.2.  Another patch from 4.2 to use
SIGNED_16BIT_OFFSET_EXTRA_P has already been committed.

This patch adjusts the instruction size for prefixed addresses for vector
128-bit types.  Compared to patch #4, I simplified the size calculator quite a
bit (that old calculation was done before I created the prefixed_length and
non_prefixed_length attributes).

2019-10-03  Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/vsx.md (vsx_mov<mode>_64bit): Make sure the
	instruction length is correct for prefixed loads and stores.
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Patch

Index: gcc/config/rs6000/vsx.md
===================================================================
--- gcc/config/rs6000/vsx.md	(revision 276523)
+++ gcc/config/rs6000/vsx.md	(working copy)
@@ -1149,10 +1149,14 @@  (define_insn "vsx_mov<mode>_64bit"
                "vecstore,  vecload,   vecsimple, mffgpr,    mftgpr,    load,
                 store,     load,      store,     *,         vecsimple, vecsimple,
                 vecsimple, *,         *,         vecstore,  vecload")
-   (set_attr "length"
+   (set_attr "non_prefixed_length"
                "*,         *,         *,         8,         *,         8,
                 8,         8,         8,         8,         *,         *,
                 *,         20,        8,         *,         *")
+   (set_attr "prefixed_length"
+               "*,         *,         *,         8,         *,         20,
+                20,        20,        20,        8,         *,         *,
+                *,         20,        8,         *,         *")
    (set_attr "isa"
                "<VSisa>,   <VSisa>,   <VSisa>,   *,         *,         *,
                 *,         *,         *,         *,         p9v,       *,