@@ -20,6 +20,7 @@
struct designware_wdt_priv {
void __iomem *base;
+ unsigned int clk_khz;
};
/*
@@ -106,7 +107,7 @@ static int designware_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
designware_wdt_stop(dev);
/* set timer in miliseconds */
- designware_wdt_settimeout(priv->base, CONFIG_DW_WDT_CLOCK_KHZ, timeout);
+ designware_wdt_settimeout(priv->base, priv->clk_khz, timeout);
designware_wdt_enable(priv->base);
@@ -122,6 +123,20 @@ static int designware_wdt_probe(struct udevice *dev)
if (!priv->base)
return -EINVAL;
+#if CONFIG_IS_ENABLED(CLK)
+ struct clk clk;
+
+ ret = clk_get_by_index(dev, 0, &clk);
+ if (ret)
+ return ret;
+
+ priv->clk_khz = clk_get_rate(&clk);
+ if (!priv->clk_khz)
+ return -EINVAL;
+#else
+ priv->clk_khz = CONFIG_DW_WDT_CLOCK_KHZ;
+#endif
+
/* reset to disable the watchdog */
return designware_wdt_stop(dev);
}
Add optional support for fetching watchdog clock rate from DT. This is optional as not all platforms using DW WDT support the clock framework yet. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Philipp Tomisch <philipp.tomisch@theobroma-systems.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> --- V2: - New patch --- drivers/watchdog/designware_wdt.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-)