From patchwork Fri Sep 30 12:00:31 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [U-Boot] dm644X: revert cache disable patch Date: Fri, 30 Sep 2011 02:00:31 -0000 From: nagabhushana.netagunte@ti.com X-Patchwork-Id: 117114 Message-Id: <1317384031-23669-1-git-send-email-nagabhushana.netagunte@ti.com> To: Cc: sudhakar.raj@ti.com, manjunath.hadli@ti.com From: Nagabhushana Netagunte revert commit 913a39e9aa4d935948d41cd727d53f5878414a77 as cache disabling is no more needed. Subsequent patches to new cache management framework has fixed EMAC issue with cache coherency. Signed-off-by: Nagabhushana Netagunte --- include/configs/davinci_dvevm.h | 3 --- 1 files changed, 0 insertions(+), 3 deletions(-) diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index d13ccb5..50e9e3e 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -59,9 +59,6 @@ #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ #define CONFIG_SYS_HZ 1000 #define CONFIG_SOC_DM644X -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF -#define CONFIG_SYS_L2CACHE_OFF /*====================================================*/ /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */ /* on Sonata/DV_EVM board. No EEPROM on schmoogie. */