Patchwork [U-Boot] omap3_beagle problem booting kernel on latest u-boot

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Submitter Aneesh V
Date Sept. 29, 2011, 6:59 p.m.
Message ID <4E84C00E.8000108@ti.com>
Download mbox | patch
Permalink /patch/116987/
State Superseded
Headers show

Comments

Aneesh V - Sept. 29, 2011, 6:59 p.m.
John,

On Thursday 29 September 2011 09:00 PM, John Rigby wrote:
> On Thu, Sep 29, 2011 at 3:09 AM, Aneesh V<aneesh@ti.com>  wrote:
>> John,
>>
>> My primary suspect would be cache. But the fact that
>> CONFIG_SYS_DCACHE_OFF is not helping is strange. Could you double-check
>> this and also make sure that CONFIG_SYS_L2CACHE_OFF is enabled too.
>>
>
> Ok, verified that CONFIG_SYS_DCACHE_OFF is defined and also added
> CONFIG_SYS_L2CACHE_OFF.  And it still fails.

Could you try something like below(also attached). I suspect issues
with cache invalidation before Linux.

---

Patch

From 58dd1c5642e0cf936b38345cc1c8b5f250d3672b Mon Sep 17 00:00:00 2001
From: a0393566local <a0393566local@ula0393566.(none)>
Date: Thu, 29 Sep 2011 23:58:13 +0530
Subject: [PATCH] omap3: workaround for omap3 cache issue

Signed-off-by: None <None>
---
 arch/arm/cpu/armv7/cache_v7.c    |   18 ++++++++----------
 arch/arm/cpu/armv7/omap3/board.c |    4 ++--
 2 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index 1b4e808..6907ff6 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -248,13 +248,6 @@  static void v7_inval_tlb(void)
 	CP15ISB;
 }
 
-void invalidate_dcache_all(void)
-{
-	v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL);
-
-	v7_outer_cache_inval_all();
-}
-
 /*
  * Performs a clean & invalidation of the entire data cache
  * at all levels
@@ -306,9 +299,6 @@  void  flush_cache(unsigned long start, unsigned long size)
 	flush_dcache_range(start, start + size);
 }
 #else /* #ifndef CONFIG_SYS_DCACHE_OFF */
-void invalidate_dcache_all(void)
-{
-}
 
 void flush_dcache_all(void)
 {
@@ -356,6 +346,14 @@  void invalidate_icache_all(void)
 }
 #endif
 
+
+void invalidate_dcache_all(void)
+{
+	v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL);
+
+	omap3_invalidate_l2_cache_secure();
+}
+
 /*
  * Stub implementations for outer cache operations
  */
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 0448bc9..7221f5a 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -360,9 +360,8 @@  static void omap3_setup_aux_cr(void)
 	omap3_update_aux_cr_secure(0xE0, 0);
 }
 
-#ifndef CONFIG_SYS_L2CACHE_OFF
 /* Invalidate the entire L2 cache from secure mode */
-static void omap3_invalidate_l2_cache_secure(void)
+void omap3_invalidate_l2_cache_secure(void)
 {
 	if (get_device_type() == GP_DEVICE) {
 		omap3_gp_romcode_call(OMAP3_GP_ROMCODE_API_L2_INVAL,
@@ -376,6 +375,7 @@  static void omap3_invalidate_l2_cache_secure(void)
 	}
 }
 
+#ifndef CONFIG_SYS_L2CACHE_OFF
 void v7_outer_cache_enable(void)
 {
 	/* Set L2EN */
-- 
1.7.1