[v2,3/4] ARM: dts: aspeed: ast2500: Add SCU interrupt controller
diff mbox series

Message ID 1569617929-29055-4-git-send-email-eajames@linux.ibm.com
State New
Headers show
Series
  • irqchip: Add Aspeed SCU Interrupt Controller
Related show

Commit Message

Eddie James Sept. 27, 2019, 8:58 p.m. UTC
Add a node for the interrupt controller provided by the SCU.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
---
 arch/arm/boot/dts/aspeed-g5.dtsi | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

Patch
diff mbox series

diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index e8feb8b..450c2d2 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -209,8 +209,9 @@ 
 			syscon: syscon@1e6e2000 {
 				compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
 				reg = <0x1e6e2000 0x1a8>;
+				ranges = <0 0x1e6e2000 0x1a8>;
 				#address-cells = <1>;
-				#size-cells = <0>;
+				#size-cells = <1>;
 				#clock-cells = <1>;
 				#reset-cells = <1>;
 
@@ -224,6 +225,14 @@ 
 					compatible = "aspeed,ast2500-p2a-ctrl";
 					status = "disabled";
 				};
+
+				scu_ic: interrupt-controller@18 {
+					#interrupt-cells = <1>;
+					compatible = "aspeed,ast2500-scu-ic";
+					reg = <0x18 0x04>;
+					interrupts = <21>;
+					interrupt-controller;
+				};
 			};
 
 			rng: hwrng@1e6e2078 {