From patchwork Wed Sep 28 11:00:48 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 116773 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id DB4CD1007D1 for ; Wed, 28 Sep 2011 22:11:10 +1000 (EST) Received: from localhost ([::1]:35254 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R8ruc-0008S3-H1 for incoming@patchwork.ozlabs.org; Wed, 28 Sep 2011 07:02:50 -0400 Received: from eggs.gnu.org ([140.186.70.92]:46851) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R8rt6-0004iz-3P for qemu-devel@nongnu.org; Wed, 28 Sep 2011 07:01:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R8rt2-0004Eh-8w for qemu-devel@nongnu.org; Wed, 28 Sep 2011 07:01:16 -0400 Received: from thoth.sbs.de ([192.35.17.2]:15732) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R8rt1-0004DH-PH for qemu-devel@nongnu.org; Wed, 28 Sep 2011 07:01:12 -0400 Received: from mail1.siemens.de (localhost [127.0.0.1]) by thoth.sbs.de (8.13.6/8.13.6) with ESMTP id p8SB19wa005464; Wed, 28 Sep 2011 13:01:09 +0200 Received: from mchn199C.mchp.siemens.de ([139.25.109.49]) by mail1.siemens.de (8.13.6/8.13.6) with ESMTP id p8SB18Vo017664; Wed, 28 Sep 2011 13:01:09 +0200 From: Jan Kiszka To: Anthony Liguori , qemu-devel Date: Wed, 28 Sep 2011 13:00:48 +0200 Message-Id: <68c870099f9817dc9f383a1ca8e8933db6ade4f7.1317207666.git.jan.kiszka@siemens.com> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) X-Received-From: 192.35.17.2 Cc: Blue Swirl Subject: [Qemu-devel] [PATCH 02/22] pc: Generalize ISA IRQs to GSIs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The ISA bus IRQ range is 0..15. What isa_irq_handler and IsaIrqState are actually dealing with are the Global System Interrupts. Refactor the code to clarify this. Signed-off-by: Jan Kiszka --- hw/ioapic.h | 7 +++++++ hw/isa.h | 2 ++ hw/pc.c | 18 +++++++++--------- hw/pc.h | 18 ++++++++++-------- hw/pc_piix.c | 28 ++++++++++++++-------------- 5 files changed, 42 insertions(+), 31 deletions(-) diff --git a/hw/ioapic.h b/hw/ioapic.h index cb2642a..86e63da 100644 --- a/hw/ioapic.h +++ b/hw/ioapic.h @@ -17,4 +17,11 @@ * License along with this library; if not, see . */ +#ifndef HW_IOAPIC_H +#define HW_IOAPIC_H + +#define IOAPIC_NUM_PINS 24 + void ioapic_eoi_broadcast(int vector); + +#endif /* !HW_IOAPIC_H */ diff --git a/hw/isa.h b/hw/isa.h index 432d17a..820c390 100644 --- a/hw/isa.h +++ b/hw/isa.h @@ -7,6 +7,8 @@ #include "memory.h" #include "qdev.h" +#define ISA_NUM_IRQS 16 + typedef struct ISABus ISABus; typedef struct ISADevice ISADevice; typedef struct ISADeviceInfo ISADeviceInfo; diff --git a/hw/pc.c b/hw/pc.c index a15d165..c979d4b 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -88,15 +88,15 @@ struct e820_table { static struct e820_table e820_table; struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX}; -void isa_irq_handler(void *opaque, int n, int level) +void gsi_handler(void *opaque, int n, int level) { - IsaIrqState *isa = (IsaIrqState *)opaque; + GSIState *s = opaque; - DPRINTF("isa_irqs: %s irq %d\n", level? "raise" : "lower", n); - if (n < 16) { - qemu_set_irq(isa->i8259[n], level); + DPRINTF("pc: %s GSI %d\n", level ? "raising" : "lowering", n); + if (n < ISA_NUM_IRQS) { + qemu_set_irq(s->i8259_irq[n], level); } - qemu_set_irq(isa->ioapic[n], level); + qemu_set_irq(s->ioapic_irq[n], level); } static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) @@ -1115,7 +1115,7 @@ static void cpu_request_exit(void *opaque, int irq, int level) } } -void pc_basic_device_init(qemu_irq *isa_irq, +void pc_basic_device_init(qemu_irq *gsi, ISADevice **rtc_state, bool no_vmport) { @@ -1134,8 +1134,8 @@ void pc_basic_device_init(qemu_irq *isa_irq, DeviceState *hpet = sysbus_try_create_simple("hpet", HPET_BASE, NULL); if (hpet) { - for (i = 0; i < 24; i++) { - sysbus_connect_irq(sysbus_from_qdev(hpet), i, isa_irq[i]); + for (i = 0; i < GSI_NUM_PINS; i++) { + sysbus_connect_irq(sysbus_from_qdev(hpet), i, gsi[i]); } rtc_irq = qdev_get_gpio_in(hpet, 0); } diff --git a/hw/pc.h b/hw/pc.h index 7e6ddba..4333898 100644 --- a/hw/pc.h +++ b/hw/pc.h @@ -8,6 +8,7 @@ #include "fdc.h" #include "net.h" #include "memory.h" +#include "ioapic.h" /* PC-style peripherals (also used by other machines). */ @@ -70,15 +71,16 @@ uint32_t pic_intack_read(PicState2 *s); void pic_info(Monitor *mon); void irq_info(Monitor *mon); -/* ISA */ -#define IOAPIC_NUM_PINS 0x18 +/* Global System Interrupts */ -typedef struct isa_irq_state { - qemu_irq *i8259; - qemu_irq ioapic[IOAPIC_NUM_PINS]; -} IsaIrqState; +#define GSI_NUM_PINS IOAPIC_NUM_PINS -void isa_irq_handler(void *opaque, int n, int level); +typedef struct GSIState { + qemu_irq *i8259_irq; + qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; +} GSIState; + +void gsi_handler(void *opaque, int n, int level); /* i8254.c */ @@ -141,7 +143,7 @@ void pc_memory_init(MemoryRegion *system_memory, MemoryRegion **ram_memory); qemu_irq *pc_allocate_cpu_irq(void); void pc_vga_init(PCIBus *pci_bus); -void pc_basic_device_init(qemu_irq *isa_irq, +void pc_basic_device_init(qemu_irq *gsi, ISADevice **rtc_state, bool no_vmport); void pc_init_ne2k_isa(NICInfo *nd); diff --git a/hw/pc_piix.c b/hw/pc_piix.c index ce1c87f..e6e280c 100644 --- a/hw/pc_piix.c +++ b/hw/pc_piix.c @@ -53,7 +53,7 @@ static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 }; static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 }; static const int ide_irq[MAX_IDE_BUS] = { 14, 15 }; -static void ioapic_init(IsaIrqState *isa_irq_state) +static void ioapic_init(GSIState *gsi_state) { DeviceState *dev; SysBusDevice *d; @@ -65,7 +65,7 @@ static void ioapic_init(IsaIrqState *isa_irq_state) sysbus_mmio_map(d, 0, 0xfec00000); for (i = 0; i < IOAPIC_NUM_PINS; i++) { - isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i); + gsi_state->ioapic_irq[i] = qdev_get_gpio_in(dev, i); } } @@ -87,11 +87,11 @@ static void pc_init1(MemoryRegion *system_memory, PCII440FXState *i440fx_state; int piix3_devfn = -1; qemu_irq *cpu_irq; - qemu_irq *isa_irq; + qemu_irq *gsi; qemu_irq *i8259; qemu_irq *cmos_s3; qemu_irq *smi_irq; - IsaIrqState *isa_irq_state; + GSIState *gsi_state; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; BusState *idebus[MAX_IDE_BUS]; ISADevice *rtc_state; @@ -130,11 +130,11 @@ static void pc_init1(MemoryRegion *system_memory, pci_enabled ? rom_memory : system_memory, &ram_memory); } - isa_irq_state = g_malloc0(sizeof(*isa_irq_state)); - isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24); + gsi_state = g_malloc0(sizeof(*gsi_state)); + gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS); if (pci_enabled) { - pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, + pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, gsi, system_memory, system_io, ram_size, below_4g_mem_size, 0x100000000ULL - below_4g_mem_size, @@ -149,7 +149,7 @@ static void pc_init1(MemoryRegion *system_memory, isa_bus_new(NULL, system_io); no_hpet = 1; } - isa_bus_irqs(isa_irq); + isa_bus_irqs(gsi); if (!xen_enabled()) { cpu_irq = pc_allocate_cpu_irq(); @@ -158,12 +158,12 @@ static void pc_init1(MemoryRegion *system_memory, i8259 = xen_interrupt_controller_init(); } - isa_irq_state->i8259 = i8259; + gsi_state->i8259_irq = i8259; if (pci_enabled) { - ioapic_init(isa_irq_state); + ioapic_init(gsi_state); } - pc_register_ferr_irq(isa_get_irq(13)); + pc_register_ferr_irq(gsi[13]); pc_vga_init(pci_enabled? pci_bus: NULL); @@ -172,7 +172,7 @@ static void pc_init1(MemoryRegion *system_memory, } /* init basic PC hardware */ - pc_basic_device_init(isa_irq, &rtc_state, xen_enabled()); + pc_basic_device_init(gsi, &rtc_state, xen_enabled()); for(i = 0; i < nb_nics; i++) { NICInfo *nd = &nd_table[i]; @@ -202,7 +202,7 @@ static void pc_init1(MemoryRegion *system_memory, } } - audio_init(isa_irq, pci_enabled ? pci_bus : NULL); + audio_init(gsi, pci_enabled ? pci_bus : NULL); pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, idebus[0], idebus[1], rtc_state); @@ -222,7 +222,7 @@ static void pc_init1(MemoryRegion *system_memory, smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1); /* TODO: Populate SPD eeprom data. */ smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, - isa_get_irq(9), *cmos_s3, *smi_irq, + gsi[9], *cmos_s3, *smi_irq, kvm_enabled()); smbus_eeprom_init(smbus, 8, NULL, 0); }