Patchwork mips_fulong2e: Reorder ISA bus and i8259 creation

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Submitter Jan Kiszka
Date Sept. 28, 2011, 9:19 a.m.
Message ID <4E82E686.4040604@siemens.com>
Download mbox | patch
Permalink /patch/116739/
State New
Headers show

Comments

Jan Kiszka - Sept. 28, 2011, 9:19 a.m.
Missed during memory region conversion: The i8259 now depends on the ISA
bus being created first. Reorder the initialization.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---

I had a reordering patch in my i8259-qdev queue as well, and these bits
were left over after rebasing over current master.

 hw/mips_fulong2e.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
Blue Swirl - Oct. 1, 2011, 12:05 p.m.
Thanks, applied.

On Wed, Sep 28, 2011 at 9:19 AM, Jan Kiszka <jan.kiszka@siemens.com> wrote:
> Missed during memory region conversion: The i8259 now depends on the ISA
> bus being created first. Reorder the initialization.
>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> ---
>
> I had a reordering patch in my i8259-qdev queue as well, and these bits
> were left over after rebasing over current master.
>
>  hw/mips_fulong2e.c |    8 ++++----
>  1 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/hw/mips_fulong2e.c b/hw/mips_fulong2e.c
> index f52b8c5..04921c1 100644
> --- a/hw/mips_fulong2e.c
> +++ b/hw/mips_fulong2e.c
> @@ -331,10 +331,6 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
>     cpu_mips_irq_init_cpu(env);
>     cpu_mips_clock_init(env);
>
> -    /* Interrupt controller */
> -    /* The 8259 -> IP5  */
> -    i8259 = i8259_init(env->irq[5]);
> -
>     /* North bridge, Bonito --> IP2 */
>     pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
>
> @@ -347,7 +343,11 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
>         exit(1);
>     }
>
> +    /* Interrupt controller */
> +    /* The 8259 -> IP5  */
> +    i8259 = i8259_init(env->irq[5]);
>     isa_bus_irqs(i8259);
> +
>     vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1));
>     usb_uhci_vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2));
>     usb_uhci_vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3));
> --
> 1.7.3.4
>
>

Patch

diff --git a/hw/mips_fulong2e.c b/hw/mips_fulong2e.c
index f52b8c5..04921c1 100644
--- a/hw/mips_fulong2e.c
+++ b/hw/mips_fulong2e.c
@@ -331,10 +331,6 @@  static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
     cpu_mips_irq_init_cpu(env);
     cpu_mips_clock_init(env);
 
-    /* Interrupt controller */
-    /* The 8259 -> IP5  */
-    i8259 = i8259_init(env->irq[5]);
-
     /* North bridge, Bonito --> IP2 */
     pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
 
@@ -347,7 +343,11 @@  static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
         exit(1);
     }
 
+    /* Interrupt controller */
+    /* The 8259 -> IP5  */
+    i8259 = i8259_init(env->irq[5]);
     isa_bus_irqs(i8259);
+
     vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1));
     usb_uhci_vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2));
     usb_uhci_vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3));