From patchwork Tue Sep 27 14:50:46 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Berger X-Patchwork-Id: 116617 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8C102B6F72 for ; Wed, 28 Sep 2011 00:52:35 +1000 (EST) Received: from localhost ([::1]:54991 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R8Z1K-0007bL-09 for incoming@patchwork.ozlabs.org; Tue, 27 Sep 2011 10:52:30 -0400 Received: from eggs.gnu.org ([140.186.70.92]:53890) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R8Z1B-0007R6-2O for qemu-devel@nongnu.org; Tue, 27 Sep 2011 10:52:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R8Z15-0007Vq-5X for qemu-devel@nongnu.org; Tue, 27 Sep 2011 10:52:21 -0400 Received: from e7.ny.us.ibm.com ([32.97.182.137]:53364) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R8Z15-0007Vj-2s for qemu-devel@nongnu.org; Tue, 27 Sep 2011 10:52:15 -0400 Received: from d01relay03.pok.ibm.com (d01relay03.pok.ibm.com [9.56.227.235]) by e7.ny.us.ibm.com (8.14.4/8.13.1) with ESMTP id p8RDVEmb009691 for ; Tue, 27 Sep 2011 09:31:14 -0400 Received: from d03av05.boulder.ibm.com (d03av05.boulder.ibm.com [9.17.195.85]) by d01relay03.pok.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id p8REqC0V067010 for ; Tue, 27 Sep 2011 10:52:13 -0400 Received: from d03av05.boulder.ibm.com (loopback [127.0.0.1]) by d03av05.boulder.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id p8REq4kq000881 for ; Tue, 27 Sep 2011 08:52:07 -0600 Received: from localhost.localdomain (d941e-10.watson.ibm.com [9.59.241.154]) by d03av05.boulder.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with ESMTP id p8REq3nA000780 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Tue, 27 Sep 2011 08:52:04 -0600 Received: from localhost.localdomain (d941e-10 [127.0.0.1]) by localhost.localdomain (8.14.4/8.14.3) with ESMTP id p8REq0Oc012465; Tue, 27 Sep 2011 10:52:00 -0400 Received: (from root@localhost) by localhost.localdomain (8.14.4/8.14.4/Submit) id p8REq0lX012464; Tue, 27 Sep 2011 10:52:00 -0400 Message-Id: <20110927145200.640387748@linux.vnet.ibm.com> User-Agent: quilt/0.48-1 Date: Tue, 27 Sep 2011 10:50:46 -0400 From: Stefan Berger To: stefanb@linux.vnet.ibm.com, qemu-devel@nongnu.org References: <20110927145043.875792455@linux.vnet.ibm.com> Content-Disposition: inline; filename=qemu_tpm_tis_debugreg.diff X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) X-Received-From: 32.97.182.137 Cc: anbang.ruan@cs.ox.ac.uk, mst@redhat.com, andreas.niederl@iaik.tugraz.at, serge@hallyn.com Subject: [Qemu-devel] [PATCH V10 3/5] Add a debug register X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch uses the possibility to add a vendor-specific register and adds a debug register useful for dumping the TIS's internal state. This register is only active in a debug build (#define DEBUG_TIS). v9: - prefixing all function with tpm_tis_ and all constants with TPM_TIS_ v3: - all output goes to stderr Signed-off-by: Stefan Berger --- hw/tpm_tis.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) Index: qemu-git.pt/hw/tpm_tis.c =================================================================== --- qemu-git.pt.orig/hw/tpm_tis.c +++ qemu-git.pt/hw/tpm_tis.c @@ -47,6 +47,9 @@ #define TPM_TIS_REG_DID_VID 0xf00 #define TPM_TIS_REG_RID 0xf04 +/* vendor-specific registers */ +#define TPM_TIS_REG_DEBUG 0xf90 + #define TPM_TIS_STS_VALID (1 << 7) #define TPM_TIS_STS_COMMAND_READY (1 << 6) #define TPM_TIS_STS_TPM_GO (1 << 5) @@ -92,6 +95,11 @@ #define TPM_TIS_NO_DATA_BYTE 0xff +/* local prototypes */ +static uint64_t tpm_tis_mmio_read(void *opaque, target_phys_addr_t addr, + unsigned size); + + #ifdef DEBUG_TIS static void tpm_tis_show_buffer(const TPMSizedBuffer *sb, const char *string) { @@ -319,6 +327,66 @@ static uint32_t tpm_tis_data_read(TPMSta return ret; } +#ifdef DEBUG_TIS +static void tpm_tis_dump_state(void *opaque, target_phys_addr_t addr) +{ + static const unsigned regs[] = { + TPM_TIS_REG_ACCESS, + TPM_TIS_REG_INT_ENABLE, + TPM_TIS_REG_INT_VECTOR, + TPM_TIS_REG_INT_STATUS, + TPM_TIS_REG_INTF_CAPABILITY, + TPM_TIS_REG_STS, + TPM_TIS_REG_DID_VID, + TPM_TIS_REG_RID, + 0xfff}; + int idx; + uint8_t locty = tpm_tis_locality_from_addr(addr); + target_phys_addr_t base = addr & ~0xfff; + TPMState *s = opaque; + TPMTISState *tis = &s->s.tis; + + fprintf(stderr, + "tpm_tis: active locality : %d\n" + "tpm_tis: state of locality %d : %d\n" + "tpm_tis: register dump:\n", + tis->active_locty, + locty, tis->loc[locty].state); + + for (idx = 0; regs[idx] != 0xfff; idx++) { + fprintf(stderr, "tpm_tis: 0x%04x : 0x%08x\n", regs[idx], + (uint32_t)tpm_tis_mmio_read(opaque, base + regs[idx], 4)); + } + + fprintf(stderr, + "tpm_tis: read offset : %d\n" + "tpm_tis: result buffer : ", + tis->loc[locty].r_offset); + for (idx = 0; + idx < tpm_tis_get_size_from_buffer(&tis->loc[locty].r_buffer); + idx++) { + fprintf(stderr, "%c%02x%s", + tis->loc[locty].r_offset == idx ? '>' : ' ', + tis->loc[locty].r_buffer.buffer[idx], + ((idx & 0xf) == 0xf) ? "\ntpm_tis: " : ""); + } + fprintf(stderr, + "\n" + "tpm_tis: write offset : %d\n" + "tpm_tis: request buffer: ", + tis->loc[locty].w_offset); + for (idx = 0; + idx < tpm_tis_get_size_from_buffer(&tis->loc[locty].w_buffer); + idx++) { + fprintf(stderr, "%c%02x%s", + tis->loc[locty].w_offset == idx ? '>' : ' ', + tis->loc[locty].w_buffer.buffer[idx], + ((idx & 0xf) == 0xf) ? "\ntpm_tis: " : ""); + } + fprintf(stderr, "\n"); +} +#endif + /* * Read a register of the TIS interface * See specs pages 33-63 for description of the registers @@ -391,6 +459,11 @@ static uint64_t tpm_tis_mmio_read(void * case TPM_TIS_REG_RID: val = TPM_TIS_TPM_RID; break; +#ifdef DEBUG_TIS + case TPM_TIS_REG_DEBUG: + tpm_tis_dump_state(opaque, addr); + break; +#endif } qemu_mutex_unlock(&s->state_lock);