From patchwork Mon Sep 26 20:23:18 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Miller X-Patchwork-Id: 116477 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 8FA1AB6F72 for ; Tue, 27 Sep 2011 06:23:46 +1000 (EST) Received: (qmail 4823 invoked by alias); 26 Sep 2011 20:23:39 -0000 Received: (qmail 4814 invoked by uid 22791); 26 Sep 2011 20:23:36 -0000 X-SWARE-Spam-Status: No, hits=-1.7 required=5.0 tests=AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from shards.monkeyblade.net (HELO shards.monkeyblade.net) (198.137.202.13) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 26 Sep 2011 20:23:21 +0000 Received: from localhost (cpe-66-65-62-183.nyc.res.rr.com [66.65.62.183]) (authenticated bits=0) by shards.monkeyblade.net (8.14.4/8.14.4) with ESMTP id p8QKNI5D025294 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Mon, 26 Sep 2011 13:23:19 -0700 Date: Mon, 26 Sep 2011 16:23:18 -0400 (EDT) Message-Id: <20110926.162318.1666577766938562464.davem@davemloft.net> To: gcc-patches@gcc.gnu.org Subject: [PATCH] Fix sparc %gsr write elimination and add a testcase. From: David Miller Mime-Version: 1.0 X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org I foolishly tried to use an unspec to keep the compiler from eliminating stores to %gsr, when the proper thing to do is to mark it in global_regs[] instead. Committed to trunk. gcc/ * config/sparc/sparc.c (sparc_conditional_register_usage): When VIS is enabled, mark %gsr as global. * config/sparc/sparc.md (UNSPEC_WRGSR): Delete. (wrgsr_vis, *wrgsr_sp64, wrgsr_v8plus): Don't wrap in an unspec. gcc/testsuite/ * gcc.target/sparc/wrgsr.c: New test. --- gcc/ChangeLog | 5 +++++ gcc/config/sparc/sparc.c | 2 ++ gcc/config/sparc/sparc.md | 11 ++++------- gcc/testsuite/ChangeLog | 4 ++++ gcc/testsuite/gcc.target/sparc/wrgsr.c | 15 +++++++++++++++ 5 files changed, 30 insertions(+), 7 deletions(-) create mode 100644 gcc/testsuite/gcc.target/sparc/wrgsr.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 309eca5..53afbd9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2011-09-26 David S. Miller + * config/sparc/sparc.c (sparc_conditional_register_usage): When VIS + is enabled, mark %gsr as global. + * config/sparc/sparc.md (UNSPEC_WRGSR): Delete. + (wrgsr_vis, *wrgsr_sp64, wrgsr_v8plus): Don't wrap in an unspec. + * config/sparc/sparc-c.c: New file implementing sparc_target_macros, which will now define __VIS and __VIS__ when -mvis is enabled. * config/sparc/t-sparc: Likewise. diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 8193d1c..a395321 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -10426,6 +10426,8 @@ sparc_conditional_register_usage (void) for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) leaf_reg_remap [regno] = regno; } + if (TARGET_VIS) + global_regs[SPARC_GSR_REG] = 1; } /* Implement TARGET_PREFERRED_RELOAD_CLASS diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 3f7a93b..e79e842 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -58,7 +58,7 @@ (UNSPEC_MUL8UL 46) (UNSPEC_MULDUL 47) (UNSPEC_ALIGNDATA 48) - (UNSPEC_WRGSR 49) + (UNSPEC_PDIST 50) (UNSPEC_EDGE8 51) (UNSPEC_EDGE8L 52) @@ -7953,8 +7953,7 @@ (set_attr "fptype" "double")]) (define_expand "wrgsr_vis" - [(set (reg:DI GSR_REG) (unspec:DI [(match_operand:DI 0 "arith_operand" "")] - UNSPEC_WRGSR))] + [(set (reg:DI GSR_REG) (match_operand:DI 0 "arith_operand" ""))] "TARGET_VIS" { if (! TARGET_ARCH64) @@ -7965,15 +7964,13 @@ }) (define_insn "*wrgsr_sp64" - [(set (reg:DI GSR_REG) (unspec:DI [(match_operand:DI 0 "arith_operand" "rI")] - UNSPEC_WRGSR))] + [(set (reg:DI GSR_REG) (match_operand:DI 0 "arith_operand" "rI"))] "TARGET_VIS && TARGET_ARCH64" "wr\t%%g0, %0, %%gsr" [(set_attr "type" "gsr")]) (define_insn "wrgsr_v8plus" - [(set (reg:DI GSR_REG) (unspec:DI [(match_operand:DI 0 "arith_operand" "I,r")] - UNSPEC_WRGSR)) + [(set (reg:DI GSR_REG) (match_operand:DI 0 "arith_operand" "I,r")) (clobber (match_scratch:SI 1 "=X,&h"))] "TARGET_VIS && ! TARGET_ARCH64" { diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c973b42..c8619b8 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2011-09-26 David S. Miller + + * gcc.target/sparc/wrgsr.c: New test. + 2011-09-26 Janus Weil PR fortran/50515 diff --git a/gcc/testsuite/gcc.target/sparc/wrgsr.c b/gcc/testsuite/gcc.target/sparc/wrgsr.c new file mode 100644 index 0000000..6cfa060 --- /dev/null +++ b/gcc/testsuite/gcc.target/sparc/wrgsr.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O -mcpu=ultrasparc -mvis" } */ + +void set_gsr (void) +{ + __builtin_vis_write_gsr (2 << 3); +} + +void set_gsr2 (long x) +{ + __builtin_vis_write_gsr (x); +} + +/* { dg-final { scan-assembler "wr\t%g0, 16, %gsr" } } */ +/* { dg-final { scan-assembler "wr\t%g0, %" } } */