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PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(5600167)(711020)(4605104)(1401327)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7193020); SRVR:MN2PR11MB3984; x-ms-traffictypediagnostic: MN2PR11MB3984: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:7691; x-forefront-prvs: 01630974C0 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(396003)(136003)(39860400002)(376002)(366004)(346002)(199004)(189003)(478600001)(2616005)(64756008)(66476007)(3846002)(6486002)(107886003)(25786009)(6512007)(50226002)(6436002)(305945005)(99286004)(71200400001)(476003)(7416002)(486006)(256004)(66066001)(71190400001)(7736002)(76176011)(102836004)(36756003)(26005)(386003)(66446008)(14454004)(66946007)(1076003)(86362001)(6506007)(186003)(6116002)(5660300002)(66556008)(110136005)(81156014)(81166006)(2501003)(8676002)(54906003)(316002)(4326008)(8936002)(11346002)(2906002)(446003)(52116002)(2201001); DIR:OUT; SFP:1101; SCL:1; SRVR:MN2PR11MB3984; H:MN2PR11MB4448.namprd11.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: microchip.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: zhBot36dsRi5CDM0i+aCqZynPnyv641XjVJPHZBtEQbs0ZROAEONwvwhuFTp/ODLdTdcNENgHpQb0Y+zWbv9gJEkRc1GhuWzNZoDEugEnukt306L7PuvnzM4nFXYvNvBJn8EjifNyH61tzKK6Wzoq5OnbdhJ09+FjBO4xpGZ9qF1fOOStuqA2MRrgAAdCL31uufYmey5JYLR6Gp8pfNY3Bvjlz2J6XYWAUmYWNEVtJTFyCUytd/m+ZJtbG37gyK/4iyQQFomNkWQTP0hMERjm/CTQwRzFCPjJ8aghE8sbEoEqVgxm6iyWMIdvLchB1ggbm0oyIjLqSSD2IFJ+e4z91BSnloKQQboksBdVcwXzmz8Kj+ZgCLSgE4MXP6iKrDylgiIRt8pOtx0uhxUHTPXuIp+ykdp779lI5HF1eYRPjY= MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: c213c8ff-79c9-4933-2340-08d73b876515 X-MS-Exchange-CrossTenant-originalarrivaltime: 17 Sep 2019 15:55:00.2240 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: eq3Fl2VSq8vBoM2ccD+XHbBG3DJKouDvTs7bnVtM2WLndIMjFqZU9V4MVdus0QhiVb8SEGXRmaellZ1VBcBL/f16OJDI2Dt78WTOp7pt4mc= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR11MB3984 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-aspeed@lists.ozlabs.org, Tudor.Ambarus@microchip.com, linux-kernel@vger.kernel.org, vz@mleia.com, linux-mediatek@lists.infradead.org, matthias.bgg@gmail.com, computersforpeace@gmail.com, dwmw2@infradead.org, linux-arm-kernel@lists.infradead.org Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" From: Tudor Ambarus static int read_fsr(struct spi_nor *nor) becomes static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr) The new function returns 0 on success and -errno otherwise. We let the callers pass the pointer to the buffer where the value of the Flag Status Register will be written. This way we avoid the casts between int and u8, which can be confusing. Prepend spi_nor_ to the function name, all functions should begin with that. S/pr_err/dev_err and drop duplicated dev_err in callers, in case the function returns error. Signed-off-by: Tudor Ambarus --- drivers/mtd/spi-nor/spi-nor.c | 42 ++++++++++++++++++++++-------------------- 1 file changed, 22 insertions(+), 20 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index a23783641146..8cd1cadcb8b1 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -417,12 +417,15 @@ static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr) return ret; } -/* - * Read the flag status register, returning its value in the location - * Return the status register value. - * Returns negative if error occurred. +/** + * spi_nor_read_fsr() - Read the Flag Status Register. + * @nor: pointer to 'struct spi_nor' + * @fsr: buffer where the value of the Flag Status Register will be + * written. + * + * Return: 0 on success, -errno otherwise. */ -static int read_fsr(struct spi_nor *nor) +static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr) { int ret; @@ -431,20 +434,18 @@ static int read_fsr(struct spi_nor *nor) SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDFSR, 1), SPI_MEM_OP_NO_ADDR, SPI_MEM_OP_NO_DUMMY, - SPI_MEM_OP_DATA_IN(1, nor->bouncebuf, 1)); + SPI_MEM_OP_DATA_IN(1, fsr, 1)); ret = spi_mem_exec_op(nor->spimem, &op); } else { ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDFSR, - nor->bouncebuf, 1); + fsr, 1); } - if (ret < 0) { - pr_err("error %d reading FSR\n", ret); - return ret; - } + if (ret) + dev_err(nor->dev, "error %d reading FSR\n", ret); - return nor->bouncebuf[0]; + return ret; } /* @@ -787,25 +788,26 @@ static int spi_nor_clear_fsr(struct spi_nor *nor) static int spi_nor_fsr_ready(struct spi_nor *nor) { - int fsr = read_fsr(nor); - if (fsr < 0) - return fsr; + int ret = spi_nor_read_fsr(nor, &nor->bouncebuf[0]); + + if (ret) + return ret; - if (fsr & (FSR_E_ERR | FSR_P_ERR)) { - if (fsr & FSR_E_ERR) + if (nor->bouncebuf[0] & (FSR_E_ERR | FSR_P_ERR)) { + if (nor->bouncebuf[0] & FSR_E_ERR) dev_err(nor->dev, "Erase operation failed.\n"); else dev_err(nor->dev, "Program operation failed.\n"); - if (fsr & FSR_PT_ERR) + if (nor->bouncebuf[0] & FSR_PT_ERR) dev_err(nor->dev, - "Attempted to modify a protected sector.\n"); + "Attempted to modify a protected sector.\n"); spi_nor_clear_fsr(nor); return -EIO; } - return fsr & FSR_READY; + return nor->bouncebuf[0] & FSR_READY; } static int spi_nor_ready(struct spi_nor *nor)