| Message ID | 20190917120452.28135-1-m.falkowski@samsung.com |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | [v2,1/2] dt-bindings: sound: Convert Samsung I2S controller to dt-schema | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | warning | "total: 0 errors, 2 warnings, 119 lines checked" |
| robh/dt-meta-schema | fail | build log |
On 9/17/19 14:04, Maciej Falkowski wrote: > Convert Samsung I2S controller to newer dt-schema format. > > Signed-off-by: Maciej Falkowski <m.falkowski@samsung.com> > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > --- a/Documentation/devicetree/bindings/sound/samsung-i2s.txt > +++ /dev/null > @@ -1,84 +0,0 @@ > -* Samsung I2S controller > -- clocks: Handle to iis clock and RCLK source clk. > -- clock-names: > - i2s0 uses some base clocks from CMU and some are from audio subsystem internal > - clock controller. The clock names for i2s0 should be "iis", "i2s_opclk0" and > - "i2s_opclk1" as shown in the example below. > - i2s1 and i2s2 uses clocks from CMU. The clock names for i2s1 and i2s2 should > - be "iis" and "i2s_opclk0". > - "iis" is the i2s bus clock and i2s_opclk0, i2s_opclk1 are sources of the root > - clk. i2s0 has internal mux to select the source of root clk and i2s1 and i2s2 > - doesn't have any such mux. > - > -There are following clocks available at the I2S device nodes: > - CLK_I2S_CDCLK - the CDCLK (CODECLKO) gate clock, > - CLK_I2S_RCLK_PSR - the RCLK prescaler divider clock (corresponding to the > - IISPSR register), > - CLK_I2S_RCLK_SRC - the RCLKSRC mux clock (corresponding to RCLKSRC bit in > - IISMOD register). > - > -Refer to the SoC datasheet for availability of the above clocks. > -The CLK_I2S_RCLK_PSR and CLK_I2S_RCLK_SRC clocks are usually only available > -in the IIS Multi Audio Interface. > - > -Note: Old DTs may not have the #clock-cells property and then not use the I2S > -node as a clock supplier. > -Example: > - > -i2s0: i2s@3830000 { > - clocks = <&clock_audss EXYNOS_I2S_BUS>, > - <&clock_audss EXYNOS_I2S_BUS>, > - <&clock_audss EXYNOS_SCLK_I2S>; > -}; > diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml > new file mode 100644 > index 000000000000..59dc76035cb4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml > @@ -0,0 +1,119 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +properties: > + clocks: > + minItems: 1 > + maxItems: 3 > + > + clock-names: > + oneOf: > + - items: > + - const: iis > + - items: > + - const: iis > + - const: i2s_opclk0 > + - items: > + - const: iis > + - const: i2s_opclk0 > + - const: i2s_opclk1 > + description: | > + "iis" is the i2s bus clock. > + For i2s1 and i2s2 - "iis", "i2s_opclk0" > + For i2s0 - "iis", "i2s_opclk0", "i2s_opclk1" My impression is that there is a significant information loss in conversion of: clocks, clock-names properties. Can't we describe the meaning of CLK_I2S_CDCLK, CLK_I2S_RCLK_PSR, CLK_I2S_RCLK_SRC supplier clocks similarly as it was in txt version? > +examples: > + - | > + i2s0: i2s@3830000 { > + compatible = "samsung,s5pv210-i2s"; > + reg = <0x03830000 0x100>; > + dmas = <&pdma0 10 > + &pdma0 9 > + &pdma0 8>; > + dma-names = "tx", "rx", "tx-sec"; > + clocks = <&clock_audss 0>, // EXYNOS_I2S_BUS > + <&clock_audss 0>, // EXYNOS_I2S_BUS > + <&clock_audss 0>; // EXYNOS_SCLK_I2S It should not be <&clock_audss 0> for each clock, each clock has different index as indicated by the commented out macro definitions. > + clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
On Tue, Sep 17, 2019 at 7:05 AM Maciej Falkowski <m.falkowski@samsung.com> wrote: > > Convert Samsung I2S controller to newer dt-schema format. > > Signed-off-by: Maciej Falkowski <m.falkowski@samsung.com> > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > --- > v2: > - Added missing Signed-off-by certificate > --- > .../devicetree/bindings/sound/samsung-i2s.txt | 84 ------------- > .../bindings/sound/samsung-i2s.yaml | 119 ++++++++++++++++++ > 2 files changed, 119 insertions(+), 84 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.txt > create mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.yaml > diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml > new file mode 100644 > index 000000000000..59dc76035cb4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml > @@ -0,0 +1,119 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Samsung SoC I2S controller > + > +maintainers: > + - Krzysztof Kozlowski <krzk@kernel.org> > + - Sangbeom Kim <sbkim73@samsung.com> > + - Sylwester Nawrocki <s.nawrocki@samsung.com> > + > +properties: > + compatible: > + description: | > + samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. > + > + samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with > + secondary fifo, s/w reset control and internal mux for root clk src. > + > + samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for > + playback, stereo channel capture, secondary fifo using internal > + or external dma, s/w reset control, internal mux for root clk src > + and 7.1 channel TDM support for playback. TDM (Time division multiplexing) > + is to allow transfer of multiple channel audio data on single data line. > + > + samsung,exynos7-i2s: with all the available features of exynos5 i2s. > + > + exynos7 I2S has 7.1 channel TDM support for capture, secondary fifo > + with only external dma and more no.of root clk sampling frequencies. > + > + samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports > + stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel with > + slightly modified bit offsets. > + enum: > + - "samsung,s3c6410-i2s" > + - "samsung,s5pv210-i2s" > + - "samsung,exynos5420-i2s" > + - "samsung,exynos7-i2s" > + - "samsung,exynos7-i2s1" No need for quotes here. > + > + reg: > + maxItems: 1 > + > + dmas: > + description: list of DMA controller phandle and DMA request line ordered pairs. How many? > + > + dma-names: > + description: | > + identifier string for each DMA request line in the dmas property. > + These strings correspond 1:1 with the ordered pairs in dmas. > + > + clocks: > + minItems: 1 > + maxItems: 3 > + > + clock-names: > + oneOf: > + - items: > + - const: iis > + - items: > + - const: iis > + - const: i2s_opclk0 > + - items: > + - const: iis > + - const: i2s_opclk0 > + - const: i2s_opclk1 > + description: | > + "iis" is the i2s bus clock. > + For i2s1 and i2s2 - "iis", "i2s_opclk0" > + For i2s0 - "iis", "i2s_opclk0", "i2s_opclk1" > + > + "#clock-cells": > + const: 1 > + > + samsung,idma-addr: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: | > + Internal DMA register base address of the audio > + sub system(used in secondary sound source). > + > + pinctrl-0: > + description: Should specify pin control groups used for this controller. > + > + pinctrl-names: > + const: default > + > + "#sound-dai-cells": > + const: 1 > + > +required: > + - compatible > + - reg > + - dmas > + - dma-names > + - clocks > + - clock-names > + > +examples: > + - | > + i2s0: i2s@3830000 { > + compatible = "samsung,s5pv210-i2s"; > + reg = <0x03830000 0x100>; > + dmas = <&pdma0 10 > + &pdma0 9 > + &pdma0 8>; > + dma-names = "tx", "rx", "tx-sec"; > + clocks = <&clock_audss 0>, // EXYNOS_I2S_BUS > + <&clock_audss 0>, // EXYNOS_I2S_BUS > + <&clock_audss 0>; // EXYNOS_SCLK_I2S > + clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; > + #clock-cells = <1>; > + samsung,idma-addr = <0x03000000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&i2s0_bus>; > + #sound-dai-cells = <1>; > + }; > + > -- > 2.17.1 >
On 9/17/19 3:05 PM, Rob Herring wrote: > On Tue, Sep 17, 2019 at 7:05 AM Maciej Falkowski > <m.falkowski@samsung.com> wrote: >> Convert Samsung I2S controller to newer dt-schema format. >> >> Signed-off-by: Maciej Falkowski <m.falkowski@samsung.com> >> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> >> --- >> v2: >> - Added missing Signed-off-by certificate >> --- >> .../devicetree/bindings/sound/samsung-i2s.txt | 84 ------------- >> .../bindings/sound/samsung-i2s.yaml | 119 ++++++++++++++++++ >> 2 files changed, 119 insertions(+), 84 deletions(-) >> delete mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.txt >> create mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.yaml >> diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml >> new file mode 100644 >> index 000000000000..59dc76035cb4 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml >> @@ -0,0 +1,119 @@ >> +# SPDX-License-Identifier: GPL-2.0 >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Samsung SoC I2S controller >> + >> +maintainers: >> + - Krzysztof Kozlowski <krzk@kernel.org> >> + - Sangbeom Kim <sbkim73@samsung.com> >> + - Sylwester Nawrocki <s.nawrocki@samsung.com> >> + >> +properties: >> + compatible: >> + description: | >> + samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. >> + >> + samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with >> + secondary fifo, s/w reset control and internal mux for root clk src. >> + >> + samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for >> + playback, stereo channel capture, secondary fifo using internal >> + or external dma, s/w reset control, internal mux for root clk src >> + and 7.1 channel TDM support for playback. TDM (Time division multiplexing) >> + is to allow transfer of multiple channel audio data on single data line. >> + >> + samsung,exynos7-i2s: with all the available features of exynos5 i2s. >> + >> + exynos7 I2S has 7.1 channel TDM support for capture, secondary fifo >> + with only external dma and more no.of root clk sampling frequencies. >> + >> + samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports >> + stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel with >> + slightly modified bit offsets. >> + enum: >> + - "samsung,s3c6410-i2s" >> + - "samsung,s5pv210-i2s" >> + - "samsung,exynos5420-i2s" >> + - "samsung,exynos7-i2s" >> + - "samsung,exynos7-i2s1" > No need for quotes here. > >> + >> + reg: >> + maxItems: 1 >> + >> + dmas: >> + description: list of DMA controller phandle and DMA request line ordered pairs. > How many? Hi Rob, I have one problem with determining size of dmas. It seems that there are only two options for dmas: tx, rx or tx, rx, tx-sec. It looks like minItems should be two and maxItems should be three. However, some of bindings have different definition of dmas. When there is: dmas = <&pdma0 10 &pdma0 9 &pdma0 8>; the number of Items for dmas is one, when there is: dmas = <&pdma0 10>, <&pdma0 9>, <&pdma0 8>; the number of Items is three. Both of these are equal from perspective of dtc, however from schema point of view, they have different size. What is a proper solution to this kind of problem? Best regards, Maciej Falkowski >> + >> + dma-names: >> + description: | >> + identifier string for each DMA request line in the dmas property. >> + These strings correspond 1:1 with the ordered pairs in dmas. >> + >> + clocks: >> + minItems: 1 >> + maxItems: 3 >> + >> + clock-names: >> + oneOf: >> + - items: >> + - const: iis >> + - items: >> + - const: iis >> + - const: i2s_opclk0 >> + - items: >> + - const: iis >> + - const: i2s_opclk0 >> + - const: i2s_opclk1 >> + description: | >> + "iis" is the i2s bus clock. >> + For i2s1 and i2s2 - "iis", "i2s_opclk0" >> + For i2s0 - "iis", "i2s_opclk0", "i2s_opclk1" >> + >> + "#clock-cells": >> + const: 1 >> + >> + samsung,idma-addr: >> + $ref: /schemas/types.yaml#/definitions/uint32 >> + description: | >> + Internal DMA register base address of the audio >> + sub system(used in secondary sound source). >> + >> + pinctrl-0: >> + description: Should specify pin control groups used for this controller. >> + >> + pinctrl-names: >> + const: default >> + >> + "#sound-dai-cells": >> + const: 1 >> + >> +required: >> + - compatible >> + - reg >> + - dmas >> + - dma-names >> + - clocks >> + - clock-names >> + >> +examples: >> + - | >> + i2s0: i2s@3830000 { >> + compatible = "samsung,s5pv210-i2s"; >> + reg = <0x03830000 0x100>; >> + dmas = <&pdma0 10 >> + &pdma0 9 >> + &pdma0 8>; >> + dma-names = "tx", "rx", "tx-sec"; >> + clocks = <&clock_audss 0>, // EXYNOS_I2S_BUS >> + <&clock_audss 0>, // EXYNOS_I2S_BUS >> + <&clock_audss 0>; // EXYNOS_SCLK_I2S >> + clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; >> + #clock-cells = <1>; >> + samsung,idma-addr = <0x03000000>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&i2s0_bus>; >> + #sound-dai-cells = <1>; >> + }; >> + >> -- >> 2.17.1 >> >
On Wed, Sep 18, 2019 at 5:08 AM Maciej Falkowski <m.falkowski@samsung.com> wrote: > > > On 9/17/19 3:05 PM, Rob Herring wrote: > > > On Tue, Sep 17, 2019 at 7:05 AM Maciej Falkowski > > <m.falkowski@samsung.com> wrote: > >> Convert Samsung I2S controller to newer dt-schema format. > >> > >> Signed-off-by: Maciej Falkowski <m.falkowski@samsung.com> > >> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > >> --- > >> v2: > >> - Added missing Signed-off-by certificate > >> --- > >> .../devicetree/bindings/sound/samsung-i2s.txt | 84 ------------- > >> .../bindings/sound/samsung-i2s.yaml | 119 ++++++++++++++++++ > >> 2 files changed, 119 insertions(+), 84 deletions(-) > >> delete mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.txt > >> create mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.yaml > >> diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml > >> new file mode 100644 > >> index 000000000000..59dc76035cb4 > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml > >> @@ -0,0 +1,119 @@ > >> +# SPDX-License-Identifier: GPL-2.0 > >> +%YAML 1.2 > >> +--- > >> +$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# > >> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >> + > >> +title: Samsung SoC I2S controller > >> + > >> +maintainers: > >> + - Krzysztof Kozlowski <krzk@kernel.org> > >> + - Sangbeom Kim <sbkim73@samsung.com> > >> + - Sylwester Nawrocki <s.nawrocki@samsung.com> > >> + > >> +properties: > >> + compatible: > >> + description: | > >> + samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. > >> + > >> + samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with > >> + secondary fifo, s/w reset control and internal mux for root clk src. > >> + > >> + samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for > >> + playback, stereo channel capture, secondary fifo using internal > >> + or external dma, s/w reset control, internal mux for root clk src > >> + and 7.1 channel TDM support for playback. TDM (Time division multiplexing) > >> + is to allow transfer of multiple channel audio data on single data line. > >> + > >> + samsung,exynos7-i2s: with all the available features of exynos5 i2s. > >> + > >> + exynos7 I2S has 7.1 channel TDM support for capture, secondary fifo > >> + with only external dma and more no.of root clk sampling frequencies. > >> + > >> + samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports > >> + stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel with > >> + slightly modified bit offsets. > >> + enum: > >> + - "samsung,s3c6410-i2s" > >> + - "samsung,s5pv210-i2s" > >> + - "samsung,exynos5420-i2s" > >> + - "samsung,exynos7-i2s" > >> + - "samsung,exynos7-i2s1" > > No need for quotes here. > > > >> + > >> + reg: > >> + maxItems: 1 > >> + > >> + dmas: > >> + description: list of DMA controller phandle and DMA request line ordered pairs. > > How many? > > Hi Rob, > > I have one problem with determining size of dmas. > > It seems that there are only two options for dmas: tx, rx or tx, rx, tx-sec. > > It looks like minItems should be two and maxItems should be three. > > However, some of bindings have different definition of dmas. > > When there is: > > dmas = <&pdma0 10 > &pdma0 9 > &pdma0 8>; > > the number of Items for dmas is one, > > when there is: > > dmas = <&pdma0 10>, > <&pdma0 9>, > <&pdma0 8>; > > the number of Items is three. > > Both of these are equal from perspective of dtc, > > however from schema point of view, they have different size. > > > What is a proper solution to this kind of problem? The solution is writing things in the latter form. I have a script to convert a bunch of these. I need to coordinate doing that at the end of a merge window. Rob
On Fri, Sep 20, 2019 at 02:14:30PM +0200, Marek Szyprowski wrote: > From: Maciej Falkowski <m.falkowski@samsung.com> > > Change representation of phandle array as then > dt-schema counts number of its items properly. > > Signed-off-by: Maciej Falkowski <m.falkowski@samsung.com> > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > --- > arch/arm/boot/dts/exynos5250.dtsi | 14 +++++++------- > arch/arm/boot/dts/exynos5410.dtsi | 6 +++--- > arch/arm/boot/dts/exynos5420.dtsi | 14 +++++++------- > 3 files changed, 17 insertions(+), 17 deletions(-) Looks good, I'll take it after merge window but why this is in-reply-to (inside thread) of completely different patchset? Best regards, Krzysztof
On Fri, Sep 20, 2019 at 02:14:31PM +0200, Marek Szyprowski wrote: > From: Maciej Falkowski <m.falkowski@samsung.com> > > Change representation of phandle array as then > dt-schema counts number of its items properly. Thanks, applied. Please split the commit msg according to Coding Style (submitting patches, chapter 2 and 14). Best regards, Krzysztof
On Fri, Sep 20, 2019 at 02:14:30PM +0200, Marek Szyprowski wrote: > From: Maciej Falkowski <m.falkowski@samsung.com> > > Change representation of phandle array as then > dt-schema counts number of its items properly. > > Signed-off-by: Maciej Falkowski <m.falkowski@samsung.com> > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> > --- > arch/arm/boot/dts/exynos5250.dtsi | 14 +++++++------- > arch/arm/boot/dts/exynos5410.dtsi | 6 +++--- > arch/arm/boot/dts/exynos5420.dtsi | 14 +++++++------- Thanks, applied. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.txt b/Documentation/devicetree/bindings/sound/samsung-i2s.txt deleted file mode 100644 index a88cb00fa096..000000000000 --- a/Documentation/devicetree/bindings/sound/samsung-i2s.txt +++ /dev/null @@ -1,84 +0,0 @@ -* Samsung I2S controller - -Required SoC Specific Properties: - -- compatible : should be one of the following. - - samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. - - samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with - secondary fifo, s/w reset control and internal mux for root clk src. - - samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for - playback, stereo channel capture, secondary fifo using internal - or external dma, s/w reset control, internal mux for root clk src - and 7.1 channel TDM support for playback. TDM (Time division multiplexing) - is to allow transfer of multiple channel audio data on single data line. - - samsung,exynos7-i2s: with all the available features of exynos5 i2s, - exynos7 I2S has 7.1 channel TDM support for capture, secondary fifo - with only external dma and more no.of root clk sampling frequencies. - - samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports - stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel with - slightly modified bit offsets. - -- reg: physical base address of the controller and length of memory mapped - region. -- dmas: list of DMA controller phandle and DMA request line ordered pairs. -- dma-names: identifier string for each DMA request line in the dmas property. - These strings correspond 1:1 with the ordered pairs in dmas. -- clocks: Handle to iis clock and RCLK source clk. -- clock-names: - i2s0 uses some base clocks from CMU and some are from audio subsystem internal - clock controller. The clock names for i2s0 should be "iis", "i2s_opclk0" and - "i2s_opclk1" as shown in the example below. - i2s1 and i2s2 uses clocks from CMU. The clock names for i2s1 and i2s2 should - be "iis" and "i2s_opclk0". - "iis" is the i2s bus clock and i2s_opclk0, i2s_opclk1 are sources of the root - clk. i2s0 has internal mux to select the source of root clk and i2s1 and i2s2 - doesn't have any such mux. -- #clock-cells: should be 1, this property must be present if the I2S device - is a clock provider in terms of the common clock bindings, described in - ../clock/clock-bindings.txt. -- clock-output-names (deprecated): from the common clock bindings, names of - the CDCLK I2S output clocks, suggested values are "i2s_cdclk0", "i2s_cdclk1", - "i2s_cdclk3" for the I2S0, I2S1, I2S2 devices respectively. - -There are following clocks available at the I2S device nodes: - CLK_I2S_CDCLK - the CDCLK (CODECLKO) gate clock, - CLK_I2S_RCLK_PSR - the RCLK prescaler divider clock (corresponding to the - IISPSR register), - CLK_I2S_RCLK_SRC - the RCLKSRC mux clock (corresponding to RCLKSRC bit in - IISMOD register). - -Refer to the SoC datasheet for availability of the above clocks. -The CLK_I2S_RCLK_PSR and CLK_I2S_RCLK_SRC clocks are usually only available -in the IIS Multi Audio Interface. - -Note: Old DTs may not have the #clock-cells property and then not use the I2S -node as a clock supplier. - -Optional SoC Specific Properties: - -- samsung,idma-addr: Internal DMA register base address of the audio - sub system(used in secondary sound source). -- pinctrl-0: Should specify pin control groups used for this controller. -- pinctrl-names: Should contain only one value - "default". -- #sound-dai-cells: should be 1. - - -Example: - -i2s0: i2s@3830000 { - compatible = "samsung,s5pv210-i2s"; - reg = <0x03830000 0x100>; - dmas = <&pdma0 10 - &pdma0 9 - &pdma0 8>; - dma-names = "tx", "rx", "tx-sec"; - clocks = <&clock_audss EXYNOS_I2S_BUS>, - <&clock_audss EXYNOS_I2S_BUS>, - <&clock_audss EXYNOS_SCLK_I2S>; - clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; - #clock-cells = <1>; - samsung,idma-addr = <0x03000000>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_bus>; - #sound-dai-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml new file mode 100644 index 000000000000..59dc76035cb4 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml @@ -0,0 +1,119 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung SoC I2S controller + +maintainers: + - Krzysztof Kozlowski <krzk@kernel.org> + - Sangbeom Kim <sbkim73@samsung.com> + - Sylwester Nawrocki <s.nawrocki@samsung.com> + +properties: + compatible: + description: | + samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. + + samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with + secondary fifo, s/w reset control and internal mux for root clk src. + + samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for + playback, stereo channel capture, secondary fifo using internal + or external dma, s/w reset control, internal mux for root clk src + and 7.1 channel TDM support for playback. TDM (Time division multiplexing) + is to allow transfer of multiple channel audio data on single data line. + + samsung,exynos7-i2s: with all the available features of exynos5 i2s. + + exynos7 I2S has 7.1 channel TDM support for capture, secondary fifo + with only external dma and more no.of root clk sampling frequencies. + + samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports + stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel with + slightly modified bit offsets. + enum: + - "samsung,s3c6410-i2s" + - "samsung,s5pv210-i2s" + - "samsung,exynos5420-i2s" + - "samsung,exynos7-i2s" + - "samsung,exynos7-i2s1" + + reg: + maxItems: 1 + + dmas: + description: list of DMA controller phandle and DMA request line ordered pairs. + + dma-names: + description: | + identifier string for each DMA request line in the dmas property. + These strings correspond 1:1 with the ordered pairs in dmas. + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + oneOf: + - items: + - const: iis + - items: + - const: iis + - const: i2s_opclk0 + - items: + - const: iis + - const: i2s_opclk0 + - const: i2s_opclk1 + description: | + "iis" is the i2s bus clock. + For i2s1 and i2s2 - "iis", "i2s_opclk0" + For i2s0 - "iis", "i2s_opclk0", "i2s_opclk1" + + "#clock-cells": + const: 1 + + samsung,idma-addr: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Internal DMA register base address of the audio + sub system(used in secondary sound source). + + pinctrl-0: + description: Should specify pin control groups used for this controller. + + pinctrl-names: + const: default + + "#sound-dai-cells": + const: 1 + +required: + - compatible + - reg + - dmas + - dma-names + - clocks + - clock-names + +examples: + - | + i2s0: i2s@3830000 { + compatible = "samsung,s5pv210-i2s"; + reg = <0x03830000 0x100>; + dmas = <&pdma0 10 + &pdma0 9 + &pdma0 8>; + dma-names = "tx", "rx", "tx-sec"; + clocks = <&clock_audss 0>, // EXYNOS_I2S_BUS + <&clock_audss 0>, // EXYNOS_I2S_BUS + <&clock_audss 0>; // EXYNOS_SCLK_I2S + clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; + #clock-cells = <1>; + samsung,idma-addr = <0x03000000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_bus>; + #sound-dai-cells = <1>; + }; +