Patchwork [U-Boot,v4,4/4] Add USB support for Efika

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Submitter Jana Rapava
Date Sept. 25, 2011, 5:25 p.m.
Message ID <1316971511-5667-4-git-send-email-fermata7@gmail.com>
Download mbox | patch
Permalink /patch/116311/
State Superseded
Headers show

Comments

Jana Rapava - Sept. 25, 2011, 5:25 p.m.
This commit adds USB support for EfikaMX and EfikaSB.

Signed-off-by: Jana Rapava <fermata7@gmail.com>
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
---
Changes for v2:
      - changed to proper patch
Changes for v3:
      - merged other USB patches from u-boot-pxa/efikasb
      - offset-based access changed to struct-based access
      - use {clrset,clr,set}bits_le32() calls
      - CodingStyle and naming cleanup
Changes for v4:
       - split into patchset
       - CodingStyle and naming cleanup
       - remove endless loops
       - silence compiler warnings

 board/efikamx/Makefile      |    3 +
 board/efikamx/efikamx-usb.c |  380 +++++++++++++++++++++++++++++++++++++++++++
 board/efikamx/efikamx.c     |   10 +
 include/configs/efikamx.h   |   16 ++
 4 files changed, 409 insertions(+), 0 deletions(-)
 create mode 100644 board/efikamx/efikamx-usb.c
Marek Vasut - Sept. 25, 2011, 5:34 p.m.
On Sunday, September 25, 2011 07:25:10 PM Jana Rapava wrote:
> This commit adds USB support for EfikaMX and EfikaSB.
> 
> Signed-off-by: Jana Rapava <fermata7@gmail.com>
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Cc: Remy Bohmer <linux@bohmer.net>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
> Changes for v2:
>       - changed to proper patch
> Changes for v3:
>       - merged other USB patches from u-boot-pxa/efikasb
>       - offset-based access changed to struct-based access
>       - use {clrset,clr,set}bits_le32() calls
>       - CodingStyle and naming cleanup
> Changes for v4:
>        - split into patchset
>        - CodingStyle and naming cleanup
>        - remove endless loops
>        - silence compiler warnings
> 

Dear Jana Rapava,

[...]
> +
> +u32 ulpi_wait(u32 ulpi_bit, const char *operation, struct usb_ehci *ehci)

Put struct usb_ehci * at the first place.

> +{
> +	int timeout = ULPI_TIMEOUT;
> +	u32 tmp;

Better separation of chunks of code with newlines will help readability. Please 
fix globally.

> +	while (--timeout) {
> +		tmp = readl(&ehci->ulpi_viewpoint);
> +		if (!(tmp & ulpi_bit))
> +			break;
> +		WATCHDOG_RESET();
> +	}
> +	if (!timeout) {
> +		printf("ULPI %s timed out\n", operation);
> +		return 0;
> +	}
> +	return tmp;
> +}
> +
> +void ulpi_write(u8 *reg, u32 value, struct usb_ehci *ehci)

ulpi_write(ehci, reg, value), please fix globally and in similar functions.

Also, change u8 *reg to u8 reg, why are you passing a pointer?

[...]

> +
> +int ehci_hcd_init(void)
> +{
> +	struct usb_ehci *ehci;
> +	struct usb_control_regs *mx5_usb_control_regs;
> +	struct ulpi_regs *ulpi;
> +
> +	/* Init iMX51 EHCI */
> +	efika_usb_phy_reset();
> +	efika_usb_hub_reset();
> +	efika_usb_enable_devices();
> +
> +	mx5_usb_control_regs = (struct usb_control_regs *)(OTG_BASE_ADDR +
> +		 MX51_CTRL_REGS);

rename to MX5_CTRL_REGS_OFFSET.

> +	control_regs_setup(mx5_usb_control_regs);
> +
> +	ulpi = (struct ulpi_regs *)0;
> +	/* Init EHCI core */
> +	ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
> +		(MX51_REGISTER_LAYOUT_LENGTH * CONFIG_MXC_USB_PORT));
> +	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
> +	hcor = (struct ehci_hcor *)((uint32_t) hccr +
> +			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
> +	setbits_le32(&ehci->usbmode, CM_HOST);
> +	setbits_le32(&ehci->control, USB_EN);
> +
> +	switch (CONFIG_MXC_USB_PORT) {
> +	case 0:
> +		ehci0_init(ehci);
> +		break;
> +	case 1:
> +		ehci1_init(ehci, ulpi);
> +		break;
> +#ifdef	MACH_EFIKASB
> +	case 2:
> +		ehci2_init(ehci, ulpi);
> +		break;
> +#endif
> +	};
> +
> +	/* EfikaMX USB has issues ... */
> +	udelay(10000);
> +
> +

One newline is enough.

> +	return 0;
> +}
> +

Cheers
Jana Rapava - Sept. 26, 2011, 8:28 p.m.
> > +     while (--timeout) {
> > +             tmp = readl(&ehci->ulpi_viewpoint);
> > +             if (!(tmp & ulpi_bit))
> > +                     break;
> > +             WATCHDOG_RESET();
> > +     }
> > +     if (!timeout) {
> > +             printf("ULPI %s timed out\n", operation);
> > +             return 0;
> > +     }
> > +     return tmp;
> > +}
> > +
> > +void ulpi_write(u8 *reg, u32 value, struct usb_ehci *ehci)
>
> ulpi_write(ehci, reg, value), please fix globally and in similar functions.
>
> Also, change u8 *reg to u8 reg, why are you passing a pointer?
>

Is it really important in ulpi_read/write function to use u8 reg instead of
u8 *reg?
When I rewrite this, usb reset starts giving me ULPI operations timeout, and
I couldn't find a source of that.
The problem is in the middle of usb_new_device, but it looks like no
function calling ULPI operations is called from that function.

Regards,
Jana Rapava
Marek Vasut - Sept. 26, 2011, 8:42 p.m.
On Monday, September 26, 2011 10:28:17 PM Jana Rapava wrote:
> > > +     while (--timeout) {
> > > +             tmp = readl(&ehci->ulpi_viewpoint);
> > > +             if (!(tmp & ulpi_bit))
> > > +                     break;
> > > +             WATCHDOG_RESET();
> > > +     }
> > > +     if (!timeout) {
> > > +             printf("ULPI %s timed out\n", operation);
> > > +             return 0;
> > > +     }
> > > +     return tmp;
> > > +}
> > > +
> > > +void ulpi_write(u8 *reg, u32 value, struct usb_ehci *ehci)
> > 
> > ulpi_write(ehci, reg, value), please fix globally and in similar
> > functions.
> > 
> > Also, change u8 *reg to u8 reg, why are you passing a pointer?
> 
> Is it really important in ulpi_read/write function to use u8 reg instead of
> u8 *reg?

Yes

> When I rewrite this, usb reset starts giving me ULPI operations timeout,
> and I couldn't find a source of that.
> The problem is in the middle of usb_new_device, but it looks like no
> function calling ULPI operations is called from that function.

No idea, verify what you're passing to the functions.

Cheers
> 
> Regards,
> Jana Rapava
Marek Vasut - Sept. 26, 2011, 8:51 p.m.
On Monday, September 26, 2011 10:28:17 PM Jana Rapava wrote:
> > > +     while (--timeout) {
> > > +             tmp = readl(&ehci->ulpi_viewpoint);
> > > +             if (!(tmp & ulpi_bit))
> > > +                     break;
> > > +             WATCHDOG_RESET();
> > > +     }
> > > +     if (!timeout) {
> > > +             printf("ULPI %s timed out\n", operation);
> > > +             return 0;
> > > +     }
> > > +     return tmp;
> > > +}
> > > +
> > > +void ulpi_write(u8 *reg, u32 value, struct usb_ehci *ehci)
> > 
> > ulpi_write(ehci, reg, value), please fix globally and in similar
> > functions.
> > 
> > Also, change u8 *reg to u8 reg, why are you passing a pointer?
> 
> Is it really important in ulpi_read/write function to use u8 reg instead of
> u8 *reg?
> When I rewrite this, usb reset starts giving me ULPI operations timeout,
> and I couldn't find a source of that.
> The problem is in the middle of usb_new_device, but it looks like no
> function calling ULPI operations is called from that function.

Actually I think this is the problem:
       writel(ULPI_RWRUN | (u32)reg << ULPI_ADDR_SHIFT, &ehci->ulpi_viewpoint);

You cast the u8 * to u32, making the whole first argument of writel() an u32. 
Whereas in the other case, when passing u8, the first argument stays u8 and the 
result is truncated.
> 
> Regards,
> Jana Rapava
Jana Rapava - Sept. 27, 2011, 11 a.m.
> Actually I think this is the problem:
>       writel(ULPI_RWRUN | (u32)reg << ULPI_ADDR_SHIFT,
> &ehci->ulpi_viewpoint);
>
> You cast the u8 * to u32, making the whole first argument of writel() an
> u32.
> Whereas in the other case, when passing u8, the first argument stays u8 and
> the
> result is truncated.
>
Thanks, but I had to change the type from u8 to u32 to silence compiler
warnings and it's solved the problem too.

Regards,
Jana Rapava

Patch

diff --git a/board/efikamx/Makefile b/board/efikamx/Makefile
index ee4a16e..860e4d2 100644
--- a/board/efikamx/Makefile
+++ b/board/efikamx/Makefile
@@ -28,6 +28,9 @@  include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(BOARD).o
 
 COBJS	:= efikamx.o
+ifdef	CONFIG_CMD_USB
+COBJS	+= efikamx-usb.o
+endif
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/efikamx/efikamx-usb.c b/board/efikamx/efikamx-usb.c
new file mode 100644
index 0000000..4e5390f
--- /dev/null
+++ b/board/efikamx/efikamx-usb.c
@@ -0,0 +1,380 @@ 
+#include <common.h>
+#include <usb.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/mx5x_pins.h>
+#include <asm/arch/iomux.h>
+#include <asm/gpio.h>
+#include <usb/ehci-fsl.h>
+#include <errno.h>
+#include <watchdog.h>
+
+#include <usb/ehci.h>
+#include <usb/ehci-core.h>
+
+/*
+ * Configure the USB H1 and USB H2 IOMUX
+ */
+#define USB_PAD_CONFIG	(PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST | \
+			PAD_CTL_DRV_HIGH | PAD_CTL_100K_PU | \
+			PAD_CTL_HYS_ENABLE | PAD_CTL_PUE_PULL)
+void setup_iomux_usb(void)
+{
+	/*
+	 * Configure USBH1 pads
+	 */
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_CLK, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_CLK, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DIR, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DIR, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_NXT, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_NXT, USB_PAD_CONFIG);
+
+	mxc_request_iomux(MX51_PIN_USBH1_DATA0, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA0, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA1, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA1, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA2, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA2, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA3, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA3, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA4, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA4, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA5, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA6, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA6, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_USBH1_DATA7, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_DATA7, USB_PAD_CONFIG);
+
+	/*
+	 * Configure USBH1 control pads
+	 */
+
+	/* USB PHY reset */
+	mxc_request_iomux(MX51_PIN_EIM_D27, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D27, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+	/* USB HUB reset */
+	mxc_request_iomux(MX51_PIN_GPIO1_5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_GPIO1_5, PAD_CTL_PKE_ENABLE |
+			PAD_CTL_SRE_FAST | PAD_CTL_DRV_HIGH);
+
+
+#ifdef	CONFIG_MACH_EFIKASB
+	/*
+	 * Configure USBH2 pads (used on EfikaSB)
+	 */
+	/* USBH2_DATA */
+	mxc_request_iomux(MX51_PIN_EIM_D16, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D16, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_D17, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D17, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_D18, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D18, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_D19, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D19, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_D20, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D20, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_D21, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D21, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_D22, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D22, USB_PAD_CONFIG);
+	mxc_request_iomux(MX51_PIN_EIM_D23, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_D23, USB_PAD_CONFIG);
+
+	/* USBH2_CLK */
+	mxc_request_iomux(MX51_PIN_EIM_A24, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A24, USB_PAD_CONFIG);
+	/* USBH2_DIR */
+	mxc_request_iomux(MX51_PIN_EIM_A25, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A25, USB_PAD_CONFIG);
+	/* USBH2_STP */
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+	/* USBH2_NXT */
+	mxc_request_iomux(MX51_PIN_EIM_A27, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A27, USB_PAD_CONFIG);
+#endif
+
+	/* WIFI EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A22, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A22, 0);
+	/* WIFI RESET */
+	mxc_request_iomux(MX51_PIN_EIM_A16, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A16, 0);
+	/* BT EN (act low) */
+	mxc_request_iomux(MX51_PIN_EIM_A17, IOMUX_CONFIG_GPIO);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A17, 0);
+}
+
+/*
+ * Enable devices connected to USB BUSes
+ */
+void efika_usb_enable_devices(void)
+{
+	/* Enable Bluetooth */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A17), 1);
+
+	/* Enable WiFi */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A22), 1);
+	udelay(10000);
+
+	/* Reset the WiFi chip */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 0);
+	udelay(10000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A16), 1);
+}
+
+/*
+ * Reset USB HUB (or HUBs on EfikaSB)
+ */
+void efika_usb_hub_reset(void)
+{
+	/* HUB reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_GPIO1_5), 1);
+}
+
+/*
+ * Reset USB PHY (or PHYs on EfikaSB)
+ */
+void efika_usb_phy_reset(void)
+{
+	/* SMSC 3317 PHY reset */
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_D27), 1);
+}
+
+/*
+ * Configure control registers of the USB controller
+ */
+void control_regs_setup(struct usb_control_regs *control)
+{
+	clrsetbits_le32(&control->usbctrl,
+		(MXC_OTG_WUE | MXC_OTG_PM | MX51_H1_ULPI_IE | MX51_H1_WUE),
+		MX51_H1_PM);
+
+	clrsetbits_le32(&control->phyctrl0,
+			MX51_OTG_OVERCURD,
+			MX51_EHCI_POWERPINSE);
+
+	clrsetbits_le32(&control->phyctrl1,
+			MX51_SYSCLOCK_MASK,
+			MX51_SYSCLOCK_24_MHZ);
+
+	setbits_le32(&control->usbctrl1, MX51_H1_EXTCLKE);
+
+	clrsetbits_le32(&control->uh2ctrl,
+			(MX51_H2_ULPI_IE | MX51_H2_WUE),
+			MX51_H2_PM);
+
+	udelay(10000);
+}
+
+#define ULPI_ADDR_SHIFT		16
+#define ulpi_write_mask(value)	((value) & 0xff)
+#define ulpi_read_mask(value)	(((value) >> 8) & 0xff)
+
+u32 ulpi_wait(u32 ulpi_bit, const char *operation, struct usb_ehci *ehci)
+{
+	int timeout = ULPI_TIMEOUT;
+	u32 tmp;
+	while (--timeout) {
+		tmp = readl(&ehci->ulpi_viewpoint);
+		if (!(tmp & ulpi_bit))
+			break;
+		WATCHDOG_RESET();
+	}
+	if (!timeout) {
+		printf("ULPI %s timed out\n", operation);
+		return 0;
+	}
+	return tmp;
+}
+
+void ulpi_write(u8 *reg, u32 value, struct usb_ehci *ehci)
+{
+	if (!(readl(&ehci->ulpi_viewpoint) & ULPI_SS)) {
+		writel(ULPI_WU, &ehci->ulpi_viewpoint);
+		ulpi_wait(ULPI_WU, "wakeup", ehci);
+	}
+	writel(ULPI_RWRUN | ULPI_RWCTRL |
+		(u32)reg << ULPI_ADDR_SHIFT | ulpi_write_mask(value),
+		&ehci->ulpi_viewpoint);
+
+	ulpi_wait(ULPI_RWRUN, "write", ehci);
+}
+
+u32 ulpi_read(u8 *reg, struct usb_ehci *ehci)
+{
+	if (!(readl(&ehci->ulpi_viewpoint) & ULPI_SS)) {
+		writel(ULPI_WU, &ehci->ulpi_viewpoint);
+		ulpi_wait(ULPI_WU, "wakeup", ehci);
+	}
+	writel(ULPI_RWRUN | (u32)reg << ULPI_ADDR_SHIFT, &ehci->ulpi_viewpoint);
+	return ulpi_read_mask(ulpi_wait(ULPI_RWRUN, "read", ehci));
+}
+
+void ulpi_init(struct ulpi_regs *ulpi, struct usb_ehci *ehci)
+{
+	u32 tmp = 0;
+	int reg, i;
+
+	/* get ID from ULPI immediate registers */
+	for (reg = ULPI_ID_REGS_COUNT - 1; reg >= 0; reg--)
+		tmp |= ulpi_read((u8 *)reg, ehci) << (reg * 8);
+	/* split into vendor and product ID */
+	debug("Found ULPI TX, ID %04x:%04x\n", tmp >> 16, tmp & 0xffff);
+
+	/* ULPI check integrity */
+	for (i = 0; i < 2; i++) {
+		ulpi_write(&ulpi->scratch_write, ULPI_TEST_VALUE << i, ehci);
+		tmp = ulpi_read(&ulpi->scratch_write, ehci);
+
+		if (tmp != (ULPI_TEST_VALUE << i)) {
+			printf("ULPI integrity check failed\n");
+			return;
+		}
+	}
+
+	/* ULPI set flags */
+	ulpi_write(&ulpi->otg_ctrl_write,
+		ULPI_OTG_EXT_VBUS_IND |
+		ULPI_OTG_DM_PULLDOWN | ULPI_OTG_DP_PULLDOWN, ehci);
+	ulpi_write(&ulpi->function_ctrl_write,
+		ULPI_FC_XCVR_SELECT | ULPI_FC_OPMODE_NORMAL |
+		ULPI_FC_SUSPENDM_PWRED, ehci);
+	ulpi_write(&ulpi->iface_ctrl_write, 0, ehci);
+	ulpi_write(&ulpi->otg_ctrl_set,
+		ULPI_OTG_DRV_VBUS | ULPI_OTG_DRV_VBUS_EXT, ehci);
+
+	/*
+	 * NOTE: This violates USB specification, but otherwise, USB on Efika
+	 * doesn't charge VBUS and as a result, USB doesn't work.
+	 */
+	ulpi_write(&ulpi->otg_ctrl_set, ULPI_OTG_CHRG_VBUS, ehci);
+}
+
+void ehci_fixup(uint32_t *status_reg, uint32_t *reg_ref)
+{
+
+	struct usb_ehci *ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		(MX51_REGISTER_LAYOUT_LENGTH));
+	struct ulpi_regs *ulpi = (struct ulpi_regs *)0;
+	u32 tmp = ulpi_read(&ulpi->otg_ctrl_write, ehci);
+	tmp |= (1 << 4);
+	ulpi_write(&ulpi->otg_ctrl_write, tmp, ehci);
+	wait_ms(50);
+	/* terminate the reset */
+	*reg_ref = ehci_readl(status_reg);
+	*reg_ref |= EHCI_PS_PE;
+}
+
+void ehci0_init(struct usb_ehci *ehci)
+{
+	writel(MX51_16BIT_UTMI, &ehci->portsc);
+}
+
+void ehci1_init(struct usb_ehci *ehci, struct ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_USBH1_STP), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_USBH1_STP, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX51_PIN_USBH1_STP, USB_PAD_CONFIG);
+	udelay(10000);
+
+	clrbits_le32(&ehci->usbcmd, MX51_ITC_IMMEDIATE_MASK);
+	udelay(10000);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ulpi, ehci);
+}
+
+
+void ehci2_init(struct usb_ehci *ehci, struct ulpi_regs *ulpi)
+{
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT1);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, PAD_CTL_DRV_HIGH |
+				PAD_CTL_PKE_ENABLE | PAD_CTL_SRE_FAST);
+	gpio_direction_output(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 0);
+	udelay(1000);
+	gpio_set_value(IOMUX_TO_GPIO(MX51_PIN_EIM_A26), 1);
+	udelay(1000);
+
+	mxc_request_iomux(MX51_PIN_EIM_A26, IOMUX_CONFIG_ALT2);
+	mxc_iomux_set_pad(MX51_PIN_EIM_A26, USB_PAD_CONFIG);
+
+	writel(MX51_ULPI_MODE_MASK, &ehci->portsc);
+	udelay(10000);
+
+	ulpi_init(ulpi, ehci);
+}
+
+int ehci_hcd_init(void)
+{
+	struct usb_ehci *ehci;
+	struct usb_control_regs *mx5_usb_control_regs;
+	struct ulpi_regs *ulpi;
+
+	/* Init iMX51 EHCI */
+	efika_usb_phy_reset();
+	efika_usb_hub_reset();
+	efika_usb_enable_devices();
+
+	mx5_usb_control_regs = (struct usb_control_regs *)(OTG_BASE_ADDR +
+		 MX51_CTRL_REGS);
+	control_regs_setup(mx5_usb_control_regs);
+
+	ulpi = (struct ulpi_regs *)0;
+	/* Init EHCI core */
+	ehci = (struct usb_ehci *)(OTG_BASE_ADDR +
+		(MX51_REGISTER_LAYOUT_LENGTH * CONFIG_MXC_USB_PORT));
+	hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
+	hcor = (struct ehci_hcor *)((uint32_t) hccr +
+			HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+	setbits_le32(&ehci->usbmode, CM_HOST);
+	setbits_le32(&ehci->control, USB_EN);
+
+	switch (CONFIG_MXC_USB_PORT) {
+	case 0:
+		ehci0_init(ehci);
+		break;
+	case 1:
+		ehci1_init(ehci, ulpi);
+		break;
+#ifdef	MACH_EFIKASB
+	case 2:
+		ehci2_init(ehci, ulpi);
+		break;
+#endif
+	};
+
+	/* EfikaMX USB has issues ... */
+	udelay(10000);
+
+
+	return 0;
+}
+
+int ehci_hcd_stop(void)
+{
+	return 0;
+}
diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
index 5be1f6c..51c1854 100644
--- a/board/efikamx/efikamx.c
+++ b/board/efikamx/efikamx.c
@@ -489,6 +489,15 @@  static inline void setup_iomux_ata(void) { }
 #endif
 
 /*
+ * EHCI USB
+ */
+#ifdef	CONFIG_CMD_USB
+void setup_iomux_usb(void);
+#else
+static inline void setup_iomux_usb(void) { }
+#endif
+
+/*
  * LED configuration
  */
 void setup_iomux_led(void)
@@ -621,6 +630,7 @@  int board_late_init(void)
 
 	setup_iomux_led();
 	setup_iomux_ata();
+	setup_iomux_usb();
 
 	efikamx_toggle_led(EFIKAMX_LED_BLUE);
 
diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
index fdd0a14..9632b5d 100644
--- a/include/configs/efikamx.h
+++ b/include/configs/efikamx.h
@@ -40,6 +40,10 @@ 
 
 #define CONFIG_SYS_TEXT_BASE		0x97800000
 
+#define	CONFIG_L2_OFF
+#define	CONFIG_SYS_ICACHE_OFF
+#define	CONFIG_SYS_DCACHE_OFF
+
 /*
  * Bootloader Components Configuration
  */
@@ -168,6 +172,18 @@ 
 #endif
 
 /*
+ * USB
+ */
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI			/* Enable EHCI USB support */
+#define CONFIG_MXC_USB_PORT	1
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#define	CONFIG_USB_KEYBOARD
+#endif /* CONFIG_CMD_USB */
+
+/*
  * Filesystems
  */
 #ifdef CONFIG_CMD_FAT