From patchwork Sat Sep 24 18:19:32 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Blue Swirl X-Patchwork-Id: 116256 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 55DD5B6F6F for ; Sun, 25 Sep 2011 05:08:24 +1000 (EST) Received: from localhost ([::1]:49358 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R7Wpw-0008Qi-5g for incoming@patchwork.ozlabs.org; Sat, 24 Sep 2011 14:20:28 -0400 Received: from eggs.gnu.org ([140.186.70.92]:50001) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R7Wpq-0008Os-0Y for qemu-devel@nongnu.org; Sat, 24 Sep 2011 14:20:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R7Wpg-00038U-Pg for qemu-devel@nongnu.org; Sat, 24 Sep 2011 14:20:18 -0400 Received: from mail-qy0-f173.google.com ([209.85.216.173]:51877) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R7Wpg-000339-JY for qemu-devel@nongnu.org; Sat, 24 Sep 2011 14:20:12 -0400 Received: by qyc1 with SMTP id 1so7608661qyc.4 for ; Sat, 24 Sep 2011 11:19:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:from:date:message-id:subject:to:content-type; bh=E7uperWAgGfA82jIKDDrRNo5pJ1rAbSUUsDDmfu9/N0=; b=A1byE/d6NpDxeXSn05k7kkHzCYmgrV7uSiTNDzSw0cdSEx/Q/NjXHDRQhfR7iCDF+i VLT6d8Iv+/19HAe3P4CUOpQf5tZEEUA+Fz39DzBfieDKN9956rKb2o47oZbSYwXw7b4i VWrKckrg7IZPJBnpBpYswOFD1G/JQ0qX32e2M= Received: by 10.224.210.137 with SMTP id gk9mr3822729qab.209.1316888392111; Sat, 24 Sep 2011 11:19:52 -0700 (PDT) MIME-Version: 1.0 Received: by 10.224.6.129 with HTTP; Sat, 24 Sep 2011 11:19:32 -0700 (PDT) From: Blue Swirl Date: Sat, 24 Sep 2011 18:19:32 +0000 Message-ID: To: qemu-devel X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.216.173 Subject: [Qemu-devel] [PATCH 12/26] Sparc: avoid AREG0 for lazy condition code helpers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Make lazy condition code helpers take a parameter for CPUState instead of relying on global env. Signed-off-by: Blue Swirl --- Makefile.target | 2 +- target-sparc/cc_helper.c | 73 ++++++++++++++++++++++----------------------- target-sparc/helper.h | 4 +- target-sparc/op_helper.c | 2 +- target-sparc/translate.c | 18 ++++++------ 5 files changed, 49 insertions(+), 50 deletions(-) @@ -567,7 +567,7 @@ static void gen_op_subx_int(DisasContext *dc, TCGv dst, TCGv src1, default: /* We need external help to produce the carry. */ carry_32 = tcg_temp_new_i32(); - gen_helper_compute_C_icc(carry_32); + gen_helper_compute_C_icc(carry_32, cpu_env); break; } @@ -1091,7 +1091,7 @@ static inline void save_state(DisasContext *dc, TCGv cond) /* flush pending conditional evaluations before exposing cpu state */ if (dc->cc_op != CC_OP_FLAGS) { dc->cc_op = CC_OP_FLAGS; - gen_helper_compute_psr(); + gen_helper_compute_psr(cpu_env); } save_npc(dc, cond); } @@ -1133,7 +1133,7 @@ static inline void gen_cond(TCGv r_dst, unsigned int cc, unsigned int cond, case CC_OP_FLAGS: break; default: - gen_helper_compute_psr(); + gen_helper_compute_psr(cpu_env); dc->cc_op = CC_OP_FLAGS; break; } @@ -2106,7 +2106,7 @@ static void disas_sparc_insn(DisasContext * dc) break; #ifdef TARGET_SPARC64 case 0x2: /* V9 rdccr */ - gen_helper_compute_psr(); + gen_helper_compute_psr(cpu_env); gen_helper_rdccr(cpu_dst); gen_movl_TN_reg(rd, cpu_dst); break; @@ -2182,7 +2182,7 @@ static void disas_sparc_insn(DisasContext * dc) #ifndef TARGET_SPARC64 if (!supervisor(dc)) goto priv_insn; - gen_helper_compute_psr(); + gen_helper_compute_psr(cpu_env); dc->cc_op = CC_OP_FLAGS; gen_helper_rdpsr(cpu_dst); #else @@ -3321,7 +3321,7 @@ static void disas_sparc_insn(DisasContext * dc) dc->cc_op = CC_OP_TSUBTV; break; case 0x24: /* mulscc */ - gen_helper_compute_psr(); + gen_helper_compute_psr(cpu_env); gen_op_mulscc(cpu_dst, cpu_src1, cpu_src2); gen_movl_TN_reg(rd, cpu_dst); tcg_gen_movi_i32(cpu_cc_op, CC_OP_ADD); @@ -4417,7 +4417,7 @@ static void disas_sparc_insn(DisasContext * dc) cpu state */ if (dc->cc_op != CC_OP_FLAGS) { dc->cc_op = CC_OP_FLAGS; - gen_helper_compute_psr(); + gen_helper_compute_psr(cpu_env); } cpu_src1 = get_src1(insn, cpu_src1); if (xop == 0x3c || xop == 0x3e) { // V9 casa/casxa @@ -5269,6 +5269,6 @@ void restore_state_to_opc(CPUState *env, TranslationBlock *tb, int pc_pos) /* flush pending conditional evaluations before exposing cpu state */ if (CC_OP != CC_OP_FLAGS) { - helper_compute_psr(); + helper_compute_psr(env); } } diff --git a/Makefile.target b/Makefile.target index e67c708..5c31c66 100644 --- a/Makefile.target +++ b/Makefile.target @@ -95,7 +95,7 @@ tcg/tcg.o: cpu.h # HELPER_CFLAGS is used for all the code compiled with static register # variables -op_helper.o cc_helper.o user-exec.o: QEMU_CFLAGS += $(HELPER_CFLAGS) +op_helper.o user-exec.o: QEMU_CFLAGS += $(HELPER_CFLAGS) # Note: this is a workaround. The real fix is to avoid compiling # cpu_signal_handler() in user-exec.c. diff --git a/target-sparc/cc_helper.c b/target-sparc/cc_helper.c index a067397..04bd2cf 100644 --- a/target-sparc/cc_helper.c +++ b/target-sparc/cc_helper.c @@ -18,15 +18,14 @@ */ #include "cpu.h" -#include "dyngen-exec.h" #include "helper.h" -static uint32_t compute_all_flags(void) +static uint32_t compute_all_flags(CPUState *env) { return env->psr & PSR_ICC; } -static uint32_t compute_C_flags(void) +static uint32_t compute_C_flags(CPUState *env) { return env->psr & PSR_CARRY; } @@ -44,12 +43,12 @@ static inline uint32_t get_NZ_icc(int32_t dst) } #ifdef TARGET_SPARC64 -static uint32_t compute_all_flags_xcc(void) +static uint32_t compute_all_flags_xcc(CPUState *env) { return env->xcc & PSR_ICC; } -static uint32_t compute_C_flags_xcc(void) +static uint32_t compute_C_flags_xcc(CPUState *env) { return env->xcc & PSR_CARRY; } @@ -77,7 +76,7 @@ static inline uint32_t get_V_div_icc(target_ulong src2) return ret; } -static uint32_t compute_all_div(void) +static uint32_t compute_all_div(CPUState *env) { uint32_t ret; @@ -86,7 +85,7 @@ static uint32_t compute_all_div(void) return ret; } -static uint32_t compute_C_div(void) +static uint32_t compute_C_div(CPUState *env) { return 0; } @@ -156,7 +155,7 @@ static inline uint32_t get_V_add_xcc(target_ulong dst, target_ulong src1, return ret; } -static uint32_t compute_all_add_xcc(void) +static uint32_t compute_all_add_xcc(CPUState *env) { uint32_t ret; @@ -166,13 +165,13 @@ static uint32_t compute_all_add_xcc(void) return ret; } -static uint32_t compute_C_add_xcc(void) +static uint32_t compute_C_add_xcc(CPUState *env) { return get_C_add_xcc(CC_DST, CC_SRC); } #endif -static uint32_t compute_all_add(void) +static uint32_t compute_all_add(CPUState *env) { uint32_t ret; @@ -182,13 +181,13 @@ static uint32_t compute_all_add(void) return ret; } -static uint32_t compute_C_add(void) +static uint32_t compute_C_add(CPUState *env) { return get_C_add_icc(CC_DST, CC_SRC); } #ifdef TARGET_SPARC64 -static uint32_t compute_all_addx_xcc(void) +static uint32_t compute_all_addx_xcc(CPUState *env) { uint32_t ret; @@ -198,7 +197,7 @@ static uint32_t compute_all_addx_xcc(void) return ret; } -static uint32_t compute_C_addx_xcc(void) +static uint32_t compute_C_addx_xcc(CPUState *env) { uint32_t ret; @@ -207,7 +206,7 @@ static uint32_t compute_C_addx_xcc(void) } #endif -static uint32_t compute_all_addx(void) +static uint32_t compute_all_addx(CPUState *env) { uint32_t ret; @@ -217,7 +216,7 @@ static uint32_t compute_all_addx(void) return ret; } -static uint32_t compute_C_addx(void) +static uint32_t compute_C_addx(CPUState *env) { uint32_t ret; @@ -235,7 +234,7 @@ static inline uint32_t get_V_tag_icc(target_ulong src1, target_ulong src2) return ret; } -static uint32_t compute_all_tadd(void) +static uint32_t compute_all_tadd(CPUState *env) { uint32_t ret; @@ -246,7 +245,7 @@ static uint32_t compute_all_tadd(void) return ret; } -static uint32_t compute_all_taddtv(void) +static uint32_t compute_all_taddtv(CPUState *env) { uint32_t ret; @@ -321,7 +320,7 @@ static inline uint32_t get_V_sub_xcc(target_ulong dst, target_ulong src1, return ret; } -static uint32_t compute_all_sub_xcc(void) +static uint32_t compute_all_sub_xcc(CPUState *env) { uint32_t ret; @@ -331,13 +330,13 @@ static uint32_t compute_all_sub_xcc(void) return ret; } -static uint32_t compute_C_sub_xcc(void) +static uint32_t compute_C_sub_xcc(CPUState *env) { return get_C_sub_xcc(CC_SRC, CC_SRC2); } #endif -static uint32_t compute_all_sub(void) +static uint32_t compute_all_sub(CPUState *env) { uint32_t ret; @@ -347,13 +346,13 @@ static uint32_t compute_all_sub(void) return ret; } -static uint32_t compute_C_sub(void) +static uint32_t compute_C_sub(CPUState *env) { return get_C_sub_icc(CC_SRC, CC_SRC2); } #ifdef TARGET_SPARC64 -static uint32_t compute_all_subx_xcc(void) +static uint32_t compute_all_subx_xcc(CPUState *env) { uint32_t ret; @@ -363,7 +362,7 @@ static uint32_t compute_all_subx_xcc(void) return ret; } -static uint32_t compute_C_subx_xcc(void) +static uint32_t compute_C_subx_xcc(CPUState *env) { uint32_t ret; @@ -372,7 +371,7 @@ static uint32_t compute_C_subx_xcc(void) } #endif -static uint32_t compute_all_subx(void) +static uint32_t compute_all_subx(CPUState *env) { uint32_t ret; @@ -382,7 +381,7 @@ static uint32_t compute_all_subx(void) return ret; } -static uint32_t compute_C_subx(void) +static uint32_t compute_C_subx(CPUState *env) { uint32_t ret; @@ -390,7 +389,7 @@ static uint32_t compute_C_subx(void) return ret; } -static uint32_t compute_all_tsub(void) +static uint32_t compute_all_tsub(CPUState *env) { uint32_t ret; @@ -401,7 +400,7 @@ static uint32_t compute_all_tsub(void) return ret; } -static uint32_t compute_all_tsubtv(void) +static uint32_t compute_all_tsubtv(CPUState *env) { uint32_t ret; @@ -410,26 +409,26 @@ static uint32_t compute_all_tsubtv(void) return ret; } -static uint32_t compute_all_logic(void) +static uint32_t compute_all_logic(CPUState *env) { return get_NZ_icc(CC_DST); } -static uint32_t compute_C_logic(void) +static uint32_t compute_C_logic(CPUState *env) { return 0; } #ifdef TARGET_SPARC64 -static uint32_t compute_all_logic_xcc(void) +static uint32_t compute_all_logic_xcc(CPUState *env) { return get_NZ_xcc(CC_DST); } #endif typedef struct CCTable { - uint32_t (*compute_all)(void); /* return all the flags */ - uint32_t (*compute_c)(void); /* return the C flag */ + uint32_t (*compute_all)(CPUState *env); /* return all the flags */ + uint32_t (*compute_c)(CPUState *env); /* return the C flag */ } CCTable; static const CCTable icc_table[CC_OP_NB] = { @@ -464,23 +463,23 @@ static const CCTable xcc_table[CC_OP_NB] = { }; #endif -void helper_compute_psr(void) +void helper_compute_psr(CPUState *env) { uint32_t new_psr; - new_psr = icc_table[CC_OP].compute_all(); + new_psr = icc_table[CC_OP].compute_all(env); env->psr = new_psr; #ifdef TARGET_SPARC64 - new_psr = xcc_table[CC_OP].compute_all(); + new_psr = xcc_table[CC_OP].compute_all(env); env->xcc = new_psr; #endif CC_OP = CC_OP_FLAGS; } -uint32_t helper_compute_C_icc(void) +uint32_t helper_compute_C_icc(CPUState *env) { uint32_t ret; - ret = icc_table[CC_OP].compute_c() >> PSR_CARRY_SHIFT; + ret = icc_table[CC_OP].compute_c(env) >> PSR_CARRY_SHIFT; return ret; } diff --git a/target-sparc/helper.h b/target-sparc/helper.h index fe63846..57d0073 100644 --- a/target-sparc/helper.h +++ b/target-sparc/helper.h @@ -159,7 +159,7 @@ VIS_CMPHELPER(cmpne); #undef F_HELPER_DQ_0_1 #undef VIS_HELPER #undef VIS_CMPHELPER -DEF_HELPER_0(compute_psr, void); -DEF_HELPER_0(compute_C_icc, i32); +DEF_HELPER_1(compute_psr, void, env); +DEF_HELPER_1(compute_C_icc, i32, env); #include "def-helper.h" diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c index 33d46a4..18a00d4 100644 --- a/target-sparc/op_helper.c +++ b/target-sparc/op_helper.c @@ -372,7 +372,7 @@ void cpu_set_cwp(CPUState *env1, int new_cwp) static target_ulong get_psr(void) { - helper_compute_psr(); + helper_compute_psr(env); #if !defined (TARGET_SPARC64) return env->version | (env->psr & PSR_ICC) | diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 8c05c44..214252a 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -428,7 +428,7 @@ static void gen_op_addx_int(DisasContext *dc, TCGv dst, TCGv src1, default: /* We need external help to produce the carry. */ carry_32 = tcg_temp_new_i32(); - gen_helper_compute_C_icc(carry_32); + gen_helper_compute_C_icc(carry_32, cpu_env); break; }