| Message ID | 20190913191026.8801-3-f.fainelli@gmail.com |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | irqchip/irq-bcm7038-l1 updates | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success |
diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7038-l1-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7038-l1-intc.txt index 2117d4ac1ae5..4eb043270f5b 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7038-l1-intc.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7038-l1-intc.txt @@ -31,6 +31,11 @@ Required properties: - interrupts: specifies the interrupt line(s) in the interrupt-parent controller node; valid values depend on the type of parent interrupt controller +Optional properties: + +- brcm,irq-can-wake: If present, this means the L1 controller can be used as a + wakeup source for system suspend/resume. + If multiple reg ranges and interrupt-parent entries are present on an SMP system, the driver will allow IRQ SMP affinity to be set up through the /proc/irq/ interface. In the simplest possible configuration, only one
The BCM7038 L1 interrupt controller can be used as a wake-up interrupt controller on MIPS and ARM-based systems, document the brcm,irq-can-wake which has been "standardized" across Broadcom interrupt controllers. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> --- .../bindings/interrupt-controller/brcm,bcm7038-l1-intc.txt | 5 +++++ 1 file changed, 5 insertions(+)