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Wed, 11 Sep 2019 15:48:06 +0000 From: Wilco Dijkstra To: GCC Patches , Kyrylo Tkachov , Richard Earnshaw CC: nd Subject: [PATCH][ARM] Correctly set SLOW_BYTE_ACCESS Date: Wed, 11 Sep 2019 15:48:06 +0000 Message-ID: Authentication-Results-Original: spf=none (sender IP is ) smtp.mailfrom=Wilco.Dijkstra@arm.com; X-Microsoft-Antispam-Untrusted: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600166)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020); SRVR:HE1PR0801MB2122; x-ms-exchange-transport-forked: True x-checkrecipientrouted: true x-ms-oob-tlc-oobclassifiers: OLM:580;OLM:580; X-Forefront-Antispam-Report-Untrusted: SFV:NSPM; SFS:(10009020)(4636009)(376002)(136003)(396003)(366004)(39860400002)(346002)(54534003)(199004)(189003)(7696005)(81166006)(6636002)(8676002)(81156014)(66066001)(5660300002)(66446008)(478600001)(66476007)(66946007)(66556008)(64756008)(71200400001)(25786009)(52536014)(305945005)(7736002)(74316002)(14444005)(55016002)(71190400001)(53936002)(4326008)(6116002)(9686003)(476003)(186003)(33656002)(6506007)(3846002)(256004)(8936002)(6436002)(486006)(76116006)(14454004)(99286004)(102836004)(86362001)(26005)(110136005)(2906002)(316002); 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So set it correctly to 1 on Arm. As a result we generate much better code for bitfields: typedef struct { int x : 2, y : 8, z : 2; } X; int bitfield (X *p) { return p->x + p->y + p->z; } Before: ldrb r3, [r0] @ zero_extendqisi2 ldrh r2, [r0] ldrb r0, [r0, #1] @ zero_extendqisi2 sbfx r3, r3, #0, #2 sbfx r2, r2, #2, #8 sbfx r0, r0, #2, #2 sxtab r3, r2, r3 sxtab r0, r3, r0 bx lr After: ldr r0, [r0] sbfx r3, r0, #0, #2 sbfx r2, r0, #2, #8 sbfx r0, r0, #10, #2 sxtab r3, r2, r3 add r0, r0, r3 bx lr Bootstrap OK, OK for commit? ChangeLog: 2019-09-11 Wilco Dijkstra * config/arm/arm.h (SLOW_BYTE_ACCESS): Set to 1. diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 8b92c830de09a3ad49420fdfacde02d8efc2a89b..11212d988a0f56299c2266bace80170d074be56c 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1892,8 +1892,9 @@ enum arm_auto_incmodes ((arm_arch4 || (MODE) == QImode) ? ZERO_EXTEND \ : ((BYTES_BIG_ENDIAN && (MODE) == HImode) ? SIGN_EXTEND : UNKNOWN))) -/* Nonzero if access to memory by bytes is slow and undesirable. */ -#define SLOW_BYTE_ACCESS 0 +/* Contrary to all documentation, this enables wide bitfield accesses, + which results in better code when accessing multiple bitfields. */ +#define SLOW_BYTE_ACCESS 1 /* Immediate shift counts are truncated by the output routines (or was it the assembler?). Shift counts in a register are truncated by ARM. Note