[U-Boot,RFC,v1,1/5] imx: gpmi: add defines for hw randominizer
diff mbox series

Message ID 20190911090535.21905-2-igor.opaniuk@gmail.com
State RFC
Delegated to: Stefano Babic
Headers show
Series
  • imx: nandbcb: support for i.MX7 and bcb only updates
Related show

Commit Message

Igor Opaniuk Sept. 11, 2019, 9:05 a.m. UTC
From: Igor Opaniuk <igor.opaniuk@toradex.com>

Extend GPMI Integrated ECC Control Register Description, include
additional defines for enabling randomizer function and providing
proper randomizer type.

For additional details check i.MX7 APR, section
9.6.6.3 GPMI Integrated ECC Control Register Description
(GPMI_ECCCTRLn)

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
---

 arch/arm/include/asm/mach-imx/regs-gpmi.h | 5 +++++
 1 file changed, 5 insertions(+)

Patch
diff mbox series

diff --git a/arch/arm/include/asm/mach-imx/regs-gpmi.h b/arch/arm/include/asm/mach-imx/regs-gpmi.h
index 80cb731724..33daa53c45 100644
--- a/arch/arm/include/asm/mach-imx/regs-gpmi.h
+++ b/arch/arm/include/asm/mach-imx/regs-gpmi.h
@@ -70,6 +70,11 @@  struct mxs_gpmi_regs {
 #define	GPMI_ECCCTRL_ECC_CMD_OFFSET			13
 #define	GPMI_ECCCTRL_ECC_CMD_DECODE			(0x0 << 13)
 #define	GPMI_ECCCTRL_ECC_CMD_ENCODE			(0x1 << 13)
+#define	GPMI_ECCCTRL_RANDOMIZER_ENABLE			(1 << 11)
+#define	GPMI_ECCCTRL_RANDOMIZER_TYPE0			0
+#define	GPMI_ECCCTRL_RANDOMIZER_TYPE1			(1 << 9)
+#define	GPMI_ECCCTRL_RANDOMIZER_TYPE2			(2 << 9)
+
 #define	GPMI_ECCCTRL_ENABLE_ECC				(1 << 12)
 #define	GPMI_ECCCTRL_BUFFER_MASK_MASK			0x1ff
 #define	GPMI_ECCCTRL_BUFFER_MASK_OFFSET			0