[U-Boot,1/2] arm64: versal: Enable memory mapping via DT
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Message ID 182f705f284e48c3716b6196e6e4354b1f773f5e.1568187776.git.michal.simek@xilinx.com
State New
Delegated to: Michal Simek
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Series
  • [U-Boot,1/2] arm64: versal: Enable memory mapping via DT
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Commit Message

Michal Simek Sept. 11, 2019, 7:42 a.m. UTC
Code reads DT and setup MMU table based on memory node. This will ensure
that only DT needs to be changed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 arch/arm/mach-versal/cpu.c                    | 36 +++++++++++++------
 arch/arm/mach-versal/include/mach/sys_proto.h |  1 +
 board/xilinx/versal/board.c                   |  9 ++++-
 3 files changed, 35 insertions(+), 11 deletions(-)

Patch
diff mbox series

diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c
index 70c1908ec4b2..dc6a9205be0e 100644
--- a/arch/arm/mach-versal/cpu.c
+++ b/arch/arm/mach-versal/cpu.c
@@ -12,14 +12,15 @@ 
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static struct mm_region versal_mem_map[] = {
+#define VERSAL_MEM_MAP_USED	6
+
+#define DRAM_BANKS CONFIG_NR_DRAM_BANKS
+
+/* +1 is end of list which needs to be empty */
+#define VERSAL_MEM_MAP_MAX (VERSAL_MEM_MAP_USED + DRAM_BANKS + 1)
+
+static struct mm_region versal_mem_map[VERSAL_MEM_MAP_MAX] = {
 	{
-		.virt = 0x0UL,
-		.phys = 0x0UL,
-		.size = 0x80000000UL,
-		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-			 PTE_BLOCK_INNER_SHARE
-	}, {
 		.virt = 0x80000000UL,
 		.phys = 0x80000000UL,
 		.size = 0x70000000UL,
@@ -59,12 +60,27 @@  static struct mm_region versal_mem_map[] = {
 		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
 			 PTE_BLOCK_NON_SHARE |
 			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
-	}, {
-		/* List terminator */
-		0,
 	}
 };
 
+void mem_map_fill(void)
+{
+	int banks = VERSAL_MEM_MAP_USED;
+
+	for (int i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+		/* Zero size means no more DDR that's this is end */
+		if (!gd->bd->bi_dram[i].size)
+			break;
+
+		versal_mem_map[banks].virt = gd->bd->bi_dram[i].start;
+		versal_mem_map[banks].phys = gd->bd->bi_dram[i].start;
+		versal_mem_map[banks].size = gd->bd->bi_dram[i].size;
+		versal_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+					      PTE_BLOCK_INNER_SHARE;
+		banks = banks + 1;
+	}
+}
+
 struct mm_region *mem_map = versal_mem_map;
 
 u64 get_page_table_size(void)
diff --git a/arch/arm/mach-versal/include/mach/sys_proto.h b/arch/arm/mach-versal/include/mach/sys_proto.h
index 1dc7bf665690..05934c28d67f 100644
--- a/arch/arm/mach-versal/include/mach/sys_proto.h
+++ b/arch/arm/mach-versal/include/mach/sys_proto.h
@@ -9,3 +9,4 @@  enum {
 };
 
 void tcm_init(u8 mode);
+void mem_map_fill(void);
diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index 2b4edd8738b4..5718e1aa7e47 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -9,6 +9,7 @@ 
 #include <malloc.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/sys_proto.h>
 #include <dm/device.h>
 #include <dm/uclass.h>
 #include <versalpl.h>
@@ -194,7 +195,13 @@  int board_late_init(void)
 
 int dram_init_banksize(void)
 {
-	fdtdec_setup_memory_banksize();
+	int ret;
+
+	ret = fdtdec_setup_memory_banksize();
+	if (ret)
+		return ret;
+
+	mem_map_fill();
 
 	return 0;
 }