Patchwork [U-Boot,2/4,V2] MX5: Add AHB clock reporting and fix IPG clock reporting

login
register
mail settings
Submitter Marek Vasut
Date Sept. 22, 2011, 7:20 p.m.
Message ID <1316719237-31095-1-git-send-email-marek.vasut@gmail.com>
Download mbox | patch
Permalink /patch/116002/
State Accepted
Commit 95c0eb198da2b64b04066df9bb5978cd65b1a1a8
Delegated to: Stefano Babic
Headers show

Comments

Marek Vasut - Sept. 22, 2011, 7:20 p.m.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Hui <jason.hui@linaro.org>
---
 arch/arm/cpu/armv7/mx5/clock.c |   36 +++++++++++++++++++++++++++---------
 1 files changed, 27 insertions(+), 9 deletions(-)

V2: Use get_periph_clock() as AHB clocksource.
Jason Liu - Sept. 23, 2011, 2:09 a.m.
Hi, Marek,

On Fri, Sep 23, 2011 at 3:20 AM, Marek Vasut <marek.vasut@gmail.com> wrote:
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Jason Hui <jason.hui@linaro.org>

Here is: Jason Liu <jason.hui@linaro.org>

> ---
>  arch/arm/cpu/armv7/mx5/clock.c |   36 +++++++++++++++++++++++++++---------
>  1 files changed, 27 insertions(+), 9 deletions(-)
>
> V2: Use get_periph_clock() as AHB clocksource.
>
> diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c
> index 9f37f7f..b87b29e 100644
> --- a/arch/arm/cpu/armv7/mx5/clock.c
> +++ b/arch/arm/cpu/armv7/mx5/clock.c
> @@ -152,18 +152,35 @@ static u32 get_periph_clk(void)
>  }
>
>  /*
> + * Get the rate of ahb clock.
> + */
> +static u32 get_ahb_clk(void)
> +{
> +       uint32_t freq, div, reg;
> +
> +       freq = get_periph_clk();
> +
> +       reg = __raw_readl(&mxc_ccm->cbcdr);
> +       div = ((reg & MXC_CCM_CBCDR_AHB_PODF_MASK) >>
> +                       MXC_CCM_CBCDR_AHB_PODF_OFFSET) + 1;
> +
> +       return freq / div;
> +}
> +
> +/*
>  * Get the rate of ipg clock.
>  */
>  static u32 get_ipg_clk(void)
>  {
> -       u32 ahb_podf, ipg_podf;
> -
> -       ahb_podf = __raw_readl(&mxc_ccm->cbcdr);
> -       ipg_podf = (ahb_podf & MXC_CCM_CBCDR_IPG_PODF_MASK) >>
> -                       MXC_CCM_CBCDR_IPG_PODF_OFFSET;
> -       ahb_podf = (ahb_podf & MXC_CCM_CBCDR_AHB_PODF_MASK) >>
> -                       MXC_CCM_CBCDR_AHB_PODF_OFFSET;
> -       return get_periph_clk() / ((ahb_podf + 1) * (ipg_podf + 1));
> +       uint32_t freq, reg, div;
> +
> +       freq = get_ahb_clk();
> +
> +       reg = __raw_readl(&mxc_ccm->cbcdr);
> +       div = ((reg & MXC_CCM_CBCDR_IPG_PODF_MASK) >>
> +                       MXC_CCM_CBCDR_IPG_PODF_OFFSET) + 1;
> +
> +       return freq / div;
>  }
>
>  /*
> @@ -290,7 +307,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
>        case MXC_ARM_CLK:
>                return get_mcu_main_clk();
>        case MXC_AHB_CLK:
> -               break;
> +               return get_ahb_clk();
>        case MXC_IPG_CLK:
>                return get_ipg_clk();
>        case MXC_IPG_PERCLK:
> @@ -336,6 +353,7 @@ int do_mx5_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
>        freq = decode_pll(mxc_plls[PLL4_CLOCK], CONFIG_SYS_MX5_HCLK);
>        printf("pll4: %dMHz\n", freq / 1000000);
>  #endif
> +       printf("ahb clock     : %dHz\n", mxc_get_clock(MXC_AHB_CLK));
>        printf("ipg clock     : %dHz\n", mxc_get_clock(MXC_IPG_CLK));
>        printf("ipg per clock : %dHz\n", mxc_get_clock(MXC_IPG_PERCLK));
>

Looks good to me.

Acked-by: Jason Liu <jason.hui@linaro.org>

BR
Jason Liu

> --
> 1.7.5.4
>
>
Stefano Babic - Sept. 23, 2011, 1:12 p.m.
On 09/22/2011 09:20 PM, Marek Vasut wrote:
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Jason Hui <jason.hui@linaro.org>
> ---
>  arch/arm/cpu/armv7/mx5/clock.c |   36 +++++++++++++++++++++++++++---------
>  1 files changed, 27 insertions(+), 9 deletions(-)
> 
> V2: Use get_periph_clock() as AHB clocksource.
> 
> diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c
> index 9f37f7f..b87b29e 100644
> --- a/arch/arm/cpu/armv7/mx5/clock.c
> +++ b/arch/arm/cpu/armv7/mx5/clock.c
> @@ -152,18 +152,35 @@ static u32 get_periph_clk(void)
>  }
>  
>  /*
> + * Get the rate of ahb clock.
> + */
> +static u32 get_ahb_clk(void)
> +{
> +	uint32_t freq, div, reg;
> +
> +	freq = get_periph_clk();
> +
> +	reg = __raw_readl(&mxc_ccm->cbcdr);
> +	div = ((reg & MXC_CCM_CBCDR_AHB_PODF_MASK) >>
> +			MXC_CCM_CBCDR_AHB_PODF_OFFSET) + 1;
> +
> +	return freq / div;
> +}
> +
> +/*
>   * Get the rate of ipg clock.
>   */
>  static u32 get_ipg_clk(void)
>  {
> -	u32 ahb_podf, ipg_podf;
> -
> -	ahb_podf = __raw_readl(&mxc_ccm->cbcdr);
> -	ipg_podf = (ahb_podf & MXC_CCM_CBCDR_IPG_PODF_MASK) >>
> -			MXC_CCM_CBCDR_IPG_PODF_OFFSET;
> -	ahb_podf = (ahb_podf & MXC_CCM_CBCDR_AHB_PODF_MASK) >>
> -			MXC_CCM_CBCDR_AHB_PODF_OFFSET;
> -	return get_periph_clk() / ((ahb_podf + 1) * (ipg_podf + 1));
> +	uint32_t freq, reg, div;
> +
> +	freq = get_ahb_clk();
> +
> +	reg = __raw_readl(&mxc_ccm->cbcdr);
> +	div = ((reg & MXC_CCM_CBCDR_IPG_PODF_MASK) >>
> +			MXC_CCM_CBCDR_IPG_PODF_OFFSET) + 1;
> +
> +	return freq / div;
>  }
>  
>  /*
> @@ -290,7 +307,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
>  	case MXC_ARM_CLK:
>  		return get_mcu_main_clk();
>  	case MXC_AHB_CLK:
> -		break;
> +		return get_ahb_clk();
>  	case MXC_IPG_CLK:
>  		return get_ipg_clk();
>  	case MXC_IPG_PERCLK:
> @@ -336,6 +353,7 @@ int do_mx5_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
>  	freq = decode_pll(mxc_plls[PLL4_CLOCK], CONFIG_SYS_MX5_HCLK);
>  	printf("pll4: %dMHz\n", freq / 1000000);
>  #endif
> +	printf("ahb clock     : %dHz\n", mxc_get_clock(MXC_AHB_CLK));
>  	printf("ipg clock     : %dHz\n", mxc_get_clock(MXC_IPG_CLK));
>  	printf("ipg per clock : %dHz\n", mxc_get_clock(MXC_IPG_PERCLK));
>  

Applied to u-boot-imx, nex branch, thanks.

Best regards,
Stefano Babic

Patch

diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c
index 9f37f7f..b87b29e 100644
--- a/arch/arm/cpu/armv7/mx5/clock.c
+++ b/arch/arm/cpu/armv7/mx5/clock.c
@@ -152,18 +152,35 @@  static u32 get_periph_clk(void)
 }
 
 /*
+ * Get the rate of ahb clock.
+ */
+static u32 get_ahb_clk(void)
+{
+	uint32_t freq, div, reg;
+
+	freq = get_periph_clk();
+
+	reg = __raw_readl(&mxc_ccm->cbcdr);
+	div = ((reg & MXC_CCM_CBCDR_AHB_PODF_MASK) >>
+			MXC_CCM_CBCDR_AHB_PODF_OFFSET) + 1;
+
+	return freq / div;
+}
+
+/*
  * Get the rate of ipg clock.
  */
 static u32 get_ipg_clk(void)
 {
-	u32 ahb_podf, ipg_podf;
-
-	ahb_podf = __raw_readl(&mxc_ccm->cbcdr);
-	ipg_podf = (ahb_podf & MXC_CCM_CBCDR_IPG_PODF_MASK) >>
-			MXC_CCM_CBCDR_IPG_PODF_OFFSET;
-	ahb_podf = (ahb_podf & MXC_CCM_CBCDR_AHB_PODF_MASK) >>
-			MXC_CCM_CBCDR_AHB_PODF_OFFSET;
-	return get_periph_clk() / ((ahb_podf + 1) * (ipg_podf + 1));
+	uint32_t freq, reg, div;
+
+	freq = get_ahb_clk();
+
+	reg = __raw_readl(&mxc_ccm->cbcdr);
+	div = ((reg & MXC_CCM_CBCDR_IPG_PODF_MASK) >>
+			MXC_CCM_CBCDR_IPG_PODF_OFFSET) + 1;
+
+	return freq / div;
 }
 
 /*
@@ -290,7 +307,7 @@  unsigned int mxc_get_clock(enum mxc_clock clk)
 	case MXC_ARM_CLK:
 		return get_mcu_main_clk();
 	case MXC_AHB_CLK:
-		break;
+		return get_ahb_clk();
 	case MXC_IPG_CLK:
 		return get_ipg_clk();
 	case MXC_IPG_PERCLK:
@@ -336,6 +353,7 @@  int do_mx5_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	freq = decode_pll(mxc_plls[PLL4_CLOCK], CONFIG_SYS_MX5_HCLK);
 	printf("pll4: %dMHz\n", freq / 1000000);
 #endif
+	printf("ahb clock     : %dHz\n", mxc_get_clock(MXC_AHB_CLK));
 	printf("ipg clock     : %dHz\n", mxc_get_clock(MXC_IPG_CLK));
 	printf("ipg per clock : %dHz\n", mxc_get_clock(MXC_IPG_PERCLK));