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Mon, 9 Sep 2019 17:04:45 +0000 From: Wilco Dijkstra To: GCC Patches , Kyrylo Tkachov , Richard Earnshaw CC: nd Subject: [PATCH][ARM] Tweak HONOR_REG_ALLOC_ORDER Date: Mon, 9 Sep 2019 17:04:45 +0000 Message-ID: Authentication-Results-Original: spf=none (sender IP is ) smtp.mailfrom=Wilco.Dijkstra@arm.com; X-Microsoft-Antispam-Untrusted: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600166)(711020)(4605104)(1401327)(4618075)(2017052603328)(7193020); SRVR:VI1PR0801MB1935; x-ms-exchange-transport-forked: True x-checkrecipientrouted: true x-ms-oob-tlc-oobclassifiers: OLM:8882;OLM:8882; X-Forefront-Antispam-Report-Untrusted: SFV:NSPM; SFS:(10009020)(4636009)(136003)(39860400002)(346002)(396003)(376002)(366004)(199004)(189003)(54534003)(74316002)(14444005)(71190400001)(478600001)(26005)(9686003)(256004)(55016002)(33656002)(7696005)(8936002)(102836004)(53936002)(6506007)(186003)(8676002)(305945005)(7736002)(81166006)(81156014)(86362001)(66556008)(64756008)(66446008)(66946007)(66476007)(486006)(6436002)(6636002)(2906002)(14454004)(6116002)(3846002)(99286004)(4326008)(110136005)(76116006)(316002)(476003)(25786009)(5660300002)(66066001)(71200400001)(52536014); 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So only set it when optimizing for size. On Cortex-A57 this improves SPECINT2006 by 0.15% and SPECFP2006 by 0.25% while reducing codesize. Bootstrap OK, OK for commit? ChangeLog: 2019-09-09 Wilco Dijkstra * config/arm/arm.h (HONOR_REG_ALLOC_ORDER): Set when optimizing for size. diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 8d023389eec469ad9c8a4e88edebdad5f3c23769..e3473e29fbbb964ff1136c226fbe30d35dbf7b39 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1065,9 +1065,8 @@ extern int arm_regs_in_sequence[]; /* Use different register alloc ordering for Thumb. */ #define ADJUST_REG_ALLOC_ORDER arm_order_regs_for_local_alloc () -/* Tell IRA to use the order we define rather than messing it up with its - own cost calculations. */ -#define HONOR_REG_ALLOC_ORDER 1 +/* Tell IRA to use the order we define when optimizing for size. */ +#define HONOR_REG_ALLOC_ORDER optimize_size /* Interrupt functions can only use registers that have already been saved by the prologue, even if they would normally be