| Message ID | VI1PR0801MB21274DB91E8E5300709B246F83B70@VI1PR0801MB2127.eurprd08.prod.outlook.com |
|---|---|
| State | New |
| Headers | show |
| Series | [ARM] Tweak HONOR_REG_ALLOC_ORDER | expand |
ping
Setting HONOR_REG_ALLOC_ORDER improves codesize with -Os, however it generates
slower and larger code with -O2 and higher. So only set it when optimizing for
size. On Cortex-A57 this improves SPECINT2006 by 0.15% and SPECFP2006 by 0.25%
while reducing codesize.
Bootstrap OK, OK for commit?
ChangeLog:
2019-09-09 Wilco Dijkstra <wdijkstr@arm.com>
* config/arm/arm.h (HONOR_REG_ALLOC_ORDER): Set when optimizing for size.
--
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 8d023389eec469ad9c8a4e88edebdad5f3c23769..e3473e29fbbb964ff1136c226fbe30d35dbf7b39 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1065,9 +1065,8 @@ extern int arm_regs_in_sequence[];
/* Use different register alloc ordering for Thumb. */
#define ADJUST_REG_ALLOC_ORDER arm_order_regs_for_local_alloc ()
-/* Tell IRA to use the order we define rather than messing it up with its
- own cost calculations. */
-#define HONOR_REG_ALLOC_ORDER 1
+/* Tell IRA to use the order we define when optimizing for size. */
+#define HONOR_REG_ALLOC_ORDER optimize_size
/* Interrupt functions can only use registers that have already been
saved by the prologue, even if they would normally be
On Mon, Sep 9, 2019 at 6:05 PM Wilco Dijkstra <Wilco.Dijkstra@arm.com> wrote: > > Setting HONOR_REG_ALLOC_ORDER improves codesize with -Os, however it generates > slower and larger code with -O2 and higher. So only set it when optimizing for > size. On Cortex-A57 this improves SPECINT2006 by 0.15% and SPECFP2006 by 0.25% > while reducing codesize. > > Bootstrap OK, OK for commit? > > ChangeLog: > 2019-09-09 Wilco Dijkstra <wdijkstr@arm.com> > > * config/arm/arm.h (HONOR_REG_ALLOC_ORDER): Set when optimizing for size. > > -- > diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h > index 8d023389eec469ad9c8a4e88edebdad5f3c23769..e3473e29fbbb964ff1136c226fbe30d35dbf7b39 100644 > --- a/gcc/config/arm/arm.h > +++ b/gcc/config/arm/arm.h > @@ -1065,9 +1065,8 @@ extern int arm_regs_in_sequence[]; > /* Use different register alloc ordering for Thumb. */ > #define ADJUST_REG_ALLOC_ORDER arm_order_regs_for_local_alloc () > > -/* Tell IRA to use the order we define rather than messing it up with its > - own cost calculations. */ > -#define HONOR_REG_ALLOC_ORDER 1 > +/* Tell IRA to use the order we define when optimizing for size. */ > +#define HONOR_REG_ALLOC_ORDER optimize_size My only question would be whether it's more suitable to use optimize_function_for_size_p(cfun) instead as IIRC that gives us a chance with lto rather than the global optimize_size. Otherwise ok . regards Ramana > > /* Interrupt functions can only use registers that have already been > saved by the prologue, even if they would normally be
Hi Ramana, > My only question would be whether it's more suitable to use > optimize_function_for_size_p(cfun) instead as IIRC that gives us a > chance with lto rather than the global optimize_size. Yes that is even better and that defaults to optimize_size if cfun isn't set. I've committed this: diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 8b67c9c3657b312be223ab60c01969958baa9ed3..5fad1e5bcc2bc448489fdc8239c676246bbc8879 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1068,9 +1068,8 @@ extern int arm_regs_in_sequence[]; /* Use different register alloc ordering for Thumb. */ #define ADJUST_REG_ALLOC_ORDER arm_order_regs_for_local_alloc () -/* Tell IRA to use the order we define rather than messing it up with its - own cost calculations. */ -#define HONOR_REG_ALLOC_ORDER 1 +/* Tell IRA to use the order we define when optimizing for size. */ +#define HONOR_REG_ALLOC_ORDER optimize_function_for_size_p (cfun) /* Interrupt functions can only use registers that have already been saved by the prologue, even if they would normally be
On Fri, Oct 11, 2019 at 3:52 PM Wilco Dijkstra <Wilco.Dijkstra@arm.com> wrote: > > Hi Ramana, > > > My only question would be whether it's more suitable to use > > optimize_function_for_size_p(cfun) instead as IIRC that gives us a > > chance with lto rather than the global optimize_size. > > Yes that is even better and that defaults to optimize_size if cfun isn't > set. I've committed this: > > diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h > index 8b67c9c3657b312be223ab60c01969958baa9ed3..5fad1e5bcc2bc448489fdc8239c676246bbc8879 100644 > --- a/gcc/config/arm/arm.h > +++ b/gcc/config/arm/arm.h > @@ -1068,9 +1068,8 @@ extern int arm_regs_in_sequence[]; > /* Use different register alloc ordering for Thumb. */ > #define ADJUST_REG_ALLOC_ORDER arm_order_regs_for_local_alloc () > > -/* Tell IRA to use the order we define rather than messing it up with its > - own cost calculations. */ > -#define HONOR_REG_ALLOC_ORDER 1 > +/* Tell IRA to use the order we define when optimizing for size. */ > +#define HONOR_REG_ALLOC_ORDER optimize_function_for_size_p (cfun) I'd be happy with a patch that goes and looks at more such uses in the backend in your copious free time. hint hint. R > > /* Interrupt functions can only use registers that have already been > saved by the prologue, even if they would normally be
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 8d023389eec469ad9c8a4e88edebdad5f3c23769..e3473e29fbbb964ff1136c226fbe30d35dbf7b39 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1065,9 +1065,8 @@ extern int arm_regs_in_sequence[]; /* Use different register alloc ordering for Thumb. */ #define ADJUST_REG_ALLOC_ORDER arm_order_regs_for_local_alloc () -/* Tell IRA to use the order we define rather than messing it up with its - own cost calculations. */ -#define HONOR_REG_ALLOC_ORDER 1 +/* Tell IRA to use the order we define when optimizing for size. */ +#define HONOR_REG_ALLOC_ORDER optimize_size /* Interrupt functions can only use registers that have already been saved by the prologue, even if they would normally be