From patchwork Mon Sep 9 12:31:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frederic Barrat X-Patchwork-Id: 1159698 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46RncV2wLxz9s7T for ; Mon, 9 Sep 2019 22:32:42 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 46RncV1wr4zDqHR for ; Mon, 9 Sep 2019 22:32:42 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=fbarrat@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 46Rnbk4Kw4zDqNP for ; Mon, 9 Sep 2019 22:32:01 +1000 (AEST) Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x89CNoXA101153 for ; Mon, 9 Sep 2019 08:31:57 -0400 Received: from e06smtp04.uk.ibm.com (e06smtp04.uk.ibm.com [195.75.94.100]) by mx0b-001b2d01.pphosted.com with ESMTP id 2uwm9fqdsq-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Mon, 09 Sep 2019 08:31:57 -0400 Received: from localhost by e06smtp04.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Mon, 9 Sep 2019 13:31:54 +0100 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06avi18626390.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x89CVS9p26542534 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 9 Sep 2019 12:31:28 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9ABBFAE05F; Mon, 9 Sep 2019 12:31:52 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 60295AE058; Mon, 9 Sep 2019 12:31:52 +0000 (GMT) Received: from pic2.home (unknown [9.145.178.189]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 9 Sep 2019 12:31:52 +0000 (GMT) From: Frederic Barrat To: skiboot@lists.ozlabs.org, andrew.donnellan@au1.ibm.com, clombard@linux.ibm.com, oohall@gmail.com Date: Mon, 9 Sep 2019 14:31:36 +0200 X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190909123151.21944-1-fbarrat@linux.ibm.com> References: <20190909123151.21944-1-fbarrat@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19090912-0016-0000-0000-000002A8C552 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19090912-0017-0000-0000-0000330946C9 Message-Id: <20190909123151.21944-2-fbarrat@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-09-09_05:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1906280000 definitions=main-1909090127 Subject: [Skiboot] [PATCH 01/16] core/pci: Refactor common paths on slot hotplug X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arbab@linux.ibm.com Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Refactor code executed to remove or rescan devices when a slot power state changes, synchronously or asynchronously through a timer callback. It will be more useful in a future patch. No functional changes. Signed-off-by: Frederic Barrat Reviewed-by: Christophe Lombard Reviewed-by: Andrew Donnellan --- core/pci-opal.c | 43 ++++++++++++++++++++++++++----------------- 1 file changed, 26 insertions(+), 17 deletions(-) diff --git a/core/pci-opal.c b/core/pci-opal.c index 213a7256..d5209600 100644 --- a/core/pci-opal.c +++ b/core/pci-opal.c @@ -647,11 +647,30 @@ static int64_t opal_pci_get_power_state(uint64_t id, uint64_t data) } opal_call(OPAL_PCI_GET_POWER_STATE, opal_pci_get_power_state, 2); +static void rescan_slot_devices(struct pci_slot *slot) +{ + struct phb *phb = slot->phb; + struct pci_device *pd = slot->pd; + + slot->ops.prepare_link_change(slot, true); + pci_scan_bus(phb, pd->secondary_bus, + pd->subordinate_bus, &pd->children, pd, true); + pci_add_device_nodes(phb, &pd->children, pd->dn, + &phb->lstate, 0); +} + +static void remove_slot_devices(struct pci_slot *slot) +{ + struct phb *phb = slot->phb; + struct pci_device *pd = slot->pd; + + pci_remove_bus(phb, &pd->children); +} + static void set_power_timer(struct timer *t __unused, void *data, uint64_t now __unused) { struct pci_slot *slot = data; - struct phb *phb = slot->phb; struct pci_device *pd = slot->pd; struct dt_node *dn = pd->dn; uint8_t link; @@ -670,7 +689,7 @@ static void set_power_timer(struct timer *t __unused, void *data, break; case PCI_SLOT_STATE_SPOWER_DONE: if (slot->power_state == OPAL_PCI_SLOT_POWER_OFF) { - pci_remove_bus(phb, &pd->children); + remove_slot_devices(slot); pci_slot_set_state(slot, PCI_SLOT_STATE_NORMAL); opal_queue_msg(OPAL_MSG_ASYNC_COMP, NULL, NULL, slot->async_token, dn->phandle, @@ -682,12 +701,7 @@ static void set_power_timer(struct timer *t __unused, void *data, if (slot->ops.get_link_state(slot, &link) != OPAL_SUCCESS) link = 0; if (link) { - slot->ops.prepare_link_change(slot, true); - pci_scan_bus(phb, pd->secondary_bus, - pd->subordinate_bus, - &pd->children, pd, true); - pci_add_device_nodes(phb, &pd->children, dn, - &phb->lstate, 0); + rescan_slot_devices(slot); pci_slot_set_state(slot, PCI_SLOT_STATE_NORMAL); opal_queue_msg(OPAL_MSG_ASYNC_COMP, NULL, NULL, slot->async_token, dn->phandle, @@ -782,15 +796,10 @@ static int64_t opal_pci_set_power_state(uint64_t async_token, init_timer(&slot->timer, set_power_timer, slot); schedule_timer(&slot->timer, msecs_to_tb(10)); } else if (rc == OPAL_SUCCESS) { - if (*state == OPAL_PCI_SLOT_POWER_OFF) { - pci_remove_bus(phb, &pd->children); - } else { - slot->ops.prepare_link_change(slot, true); - pci_scan_bus(phb, pd->secondary_bus, - pd->subordinate_bus, &pd->children, pd, true); - pci_add_device_nodes(phb, &pd->children, pd->dn, - &phb->lstate, 0); - } + if (*state == OPAL_PCI_SLOT_POWER_OFF) + remove_slot_devices(slot); + else + rescan_slot_devices(slot); } phb_unlock(phb);