diff mbox series

[SPARC] Fix PR target/91472

Message ID 9341437.tDSoCyPODM@polaris
State New
Headers show
Series [SPARC] Fix PR target/91472 | expand

Commit Message

Eric Botcazou Sept. 1, 2019, 1 p.m. UTC 
This is a regression present on mainline and 9/8 branches: there is a segfault 
in one of the tests of the GMP testsuite when the compiler is configured with 
PIE by default.  The bug only affects a test, i.e. not the library itself, and 
has been introduced when the PIC register was turned into a pseudo-register.

Bootstrapped/regtested on SPARC64/Linux, applied on mainline and 9/8 branches.


2019-09-01  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/91472
	* config/sparc/sparc.c (sparc_cannot_force_const_mem): Return true
	during LRA/reload in PIC mode if the PIC register hasn't been used yet.
	(sparc_pic_register_p): Test reload_in_progress for consistency's sake.


2019-09-01  Eric Botcazou  <ebotcazou@adacore.com>

	* gcc.c-torture/execute/20190901-1.c: New test.
diff mbox series

Patch

Index: config/sparc/sparc.c
===================================================================
--- config/sparc/sparc.c	(revision 275068)
+++ config/sparc/sparc.c	(working copy)
@@ -4201,6 +4201,13 @@  eligible_for_sibcall_delay (rtx_insn *tr
 static bool
 sparc_cannot_force_const_mem (machine_mode mode, rtx x)
 {
+  /* After IRA has run in PIC mode, it is too late to put anything into the
+     constant pool if the PIC register hasn't already been initialized.  */
+  if ((lra_in_progress || reload_in_progress)
+      && flag_pic
+      && !crtl->uses_pic_offset_table)
+    return true;
+
   switch (GET_CODE (x))
     {
     case CONST_INT:
@@ -4450,7 +4457,7 @@  sparc_pic_register_p (rtx x)
     return true;
 
   if (!HARD_REGISTER_P (pic_offset_table_rtx)
-      && (HARD_REGISTER_P (x) || lra_in_progress)
+      && (HARD_REGISTER_P (x) || lra_in_progress || reload_in_progress)
       && ORIGINAL_REGNO (x) == REGNO (pic_offset_table_rtx))
     return true;