[RFC,12/14] arm64: dts: qcom: add PDC interrupt controller for SDM845
diff mbox series

Message ID 20190829181203.2660-13-ilina@codeaurora.org
State New
Headers show
Series
  • qcom: support wakeup capable GPIOs
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Commit Message

Lina Iyer Aug. 29, 2019, 6:12 p.m. UTC
Add PDC interrupt controller device bindings for SDM845.

Signed-off-by: Lina Iyer <ilina@codeaurora.org>
---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Maulik Shah Sept. 9, 2019, 11:26 a.m. UTC | #1
On 8/29/2019 11:42 PM, Lina Iyer wrote:
> Add PDC interrupt controller device bindings for SDM845.
>
> Signed-off-by: Lina Iyer <ilina@codeaurora.org>
> ---
>   arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++++++++++
>   1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index be0022e09465..ffe28b3e41d8 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -2375,6 +2375,16 @@
>   			#power-domain-cells = <1>;
>   		};
>   
> +		pdc_intc: interrupt-controller@b220000 {
> +			compatible = "qcom,sdm845-pdc";
> +			reg = <0 0x0b220000 0 0x30000>, <0x179900f0 0x60>;

second register also needs to be in below format

<0 0x179900f0 0 0x60>

> +			qcom,pdc-ranges = <0 480 94>, <94 609 15>, <115 630 7>;
> +			#interrupt-cells = <2>;
> +			interrupt-parent = <&intc>;
> +			interrupt-controller;
> +			qcom,scm-spi-cfg;
> +		};
> +
>   		pdc_reset: reset-controller@b2e0000 {
>   			compatible = "qcom,sdm845-pdc-global";
>   			reg = <0 0x0b2e0000 0 0x20000>;

Patch
diff mbox series

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index be0022e09465..ffe28b3e41d8 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2375,6 +2375,16 @@ 
 			#power-domain-cells = <1>;
 		};
 
+		pdc_intc: interrupt-controller@b220000 {
+			compatible = "qcom,sdm845-pdc";
+			reg = <0 0x0b220000 0 0x30000>, <0x179900f0 0x60>;
+			qcom,pdc-ranges = <0 480 94>, <94 609 15>, <115 630 7>;
+			#interrupt-cells = <2>;
+			interrupt-parent = <&intc>;
+			interrupt-controller;
+			qcom,scm-spi-cfg;
+		};
+
 		pdc_reset: reset-controller@b2e0000 {
 			compatible = "qcom,sdm845-pdc-global";
 			reg = <0 0x0b2e0000 0 0x20000>;