From patchwork Tue Sep 20 13:38:56 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jakub Jelinek X-Patchwork-Id: 115534 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 7133EB6FD7 for ; Tue, 20 Sep 2011 23:39:22 +1000 (EST) Received: (qmail 25457 invoked by alias); 20 Sep 2011 13:39:19 -0000 Received: (qmail 25304 invoked by uid 22791); 20 Sep 2011 13:39:17 -0000 X-SWARE-Spam-Status: No, hits=-6.8 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, SPF_HELO_PASS, TW_ZJ X-Spam-Check-By: sourceware.org Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 20 Sep 2011 13:38:59 +0000 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p8KDcxLG015112 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Tue, 20 Sep 2011 09:38:59 -0400 Received: from tyan-ft48-01.lab.bos.redhat.com (tyan-ft48-01.lab.bos.redhat.com [10.16.42.4]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id p8KDcvYK026063 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Tue, 20 Sep 2011 09:38:58 -0400 Received: from tyan-ft48-01.lab.bos.redhat.com (localhost.localdomain [127.0.0.1]) by tyan-ft48-01.lab.bos.redhat.com (8.14.4/8.14.4) with ESMTP id p8KDcvaD029505; Tue, 20 Sep 2011 15:38:57 +0200 Received: (from jakub@localhost) by tyan-ft48-01.lab.bos.redhat.com (8.14.4/8.14.4/Submit) id p8KDcuWw029503; Tue, 20 Sep 2011 15:38:56 +0200 Date: Tue, 20 Sep 2011 15:38:56 +0200 From: Jakub Jelinek To: Uros Bizjak Cc: gcc-patches@gcc.gnu.org Subject: Re: v{extract,insert,broadcast,perm2}{i,f}128 Message-ID: <20110920133856.GN2687@tyan-ft48-01.lab.bos.redhat.com> Reply-To: Jakub Jelinek References: <20110919190840.GJ2687@tyan-ft48-01.lab.bos.redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org On Tue, Sep 20, 2011 at 07:15:42AM +0200, Uros Bizjak wrote: > Perhaps use mode attribute that defines "f" for FP modes and "%i" for > integer modes. "%i" is further processed in ix86_output_operand (or > perhaps ASM_OUTPUT_OPCODE, similar to %v ?) to output "i" for > TARGET_AVX2 or "f" otherwise. > We can do something like following for the patterns (it can't be like %v, because it is not at the beginning of the insn, so it either could be some punctuation character without operand (but no idea where would it take the mode from), or as this patch, which has an operand number from which to take the mode - but as the code uses strtoul to parse the number, we can't have %I0128, so it can't expand just to i/f, but to i128/f128. But still no idea how to do it nicely for the "mode" attribute, define_mode_attr can't be conditional. Using if_then_else for "mode" attribute is of course possible, but ugly. Jakub --- gcc/config/i386/i386.c.jj 2011-09-18 21:20:04.000000000 +0200 +++ gcc/config/i386/i386.c 2011-09-20 15:20:41.000000000 +0200 @@ -13511,6 +13511,8 @@ get_some_local_dynamic_name (void) & -- print some in-use local-dynamic symbol name. H -- print a memory address offset by 8; used for sse high-parts Y -- print condition for XOP pcom* instruction. + I -- if !TARGET_AVX2 or non-integer vector mode, expand to "f128", + otherwise expand to "i128". + -- print a branch hint as 'cs' or 'ds' prefix ; -- print a semicolon (after prefixes due to bug in older gas). @ -- print a segment register of thread base pointer load @@ -14006,6 +14008,15 @@ ix86_print_operand (FILE *file, rtx x, i fputs ("gs", file); return; + case 'I': + /* %I can be used to print i128 for AVX2 and integral modes, + and f128 otherwise. */ + if (TARGET_AVX2 && GET_MODE_CLASS (GET_MODE (x)) == MODE_VECTOR_INT) + fputs ("i128", file); + else + fputs ("f128", file); + return; + default: output_operand_lossage ("invalid operand code '%c'", code); } --- gcc/config/i386/sse.md.jj 2011-09-19 17:43:35.000000000 +0200 +++ gcc/config/i386/sse.md 2011-09-20 15:28:31.000000000 +0200 @@ -3846,12 +3846,7 @@ (define_insn "vec_extract_hi_" (match_operand:VI8F_256 1 "register_operand" "x,x") (parallel [(const_int 2) (const_int 3)])))] "TARGET_AVX" -{ - if (get_attr_mode (insn) == MODE_OI) - return "vextracti128\t{$0x1, %1, %0|%0, %1, 0x1}"; - else - return "vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}"; -} + "vextract%I1\t{$0x1, %1, %0|%0, %1, 0x1}" [(set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -3891,12 +3886,7 @@ (define_insn "vec_extract_hi_" (parallel [(const_int 4) (const_int 5) (const_int 6) (const_int 7)])))] "TARGET_AVX" -{ - if (get_attr_mode (insn) == MODE_OI) - return "vextracti128\t{$0x1, %1, %0|%0, %1, 0x1}"; - else - return "vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}"; -} + "vextract%I1\t{$0x1, %1, %0|%0, %1, 0x1}" [(set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -3940,12 +3930,7 @@ (define_insn "vec_extract_hi_v16hi" (const_int 12) (const_int 13) (const_int 14) (const_int 15)])))] "TARGET_AVX" -{ - if (get_attr_mode (insn) == MODE_OI) - return "vextracti128\t{$0x1, %1, %0|%0, %1, 0x1}"; - else - return "vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}"; -} + "vextract%I1\t{$0x1, %1, %0|%0, %1, 0x1}" [(set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -3995,12 +3980,7 @@ (define_insn "vec_extract_hi_v32qi" (const_int 28) (const_int 29) (const_int 30) (const_int 31)])))] "TARGET_AVX" -{ - if (get_attr_mode (insn) == MODE_OI) - return "vextracti128\t{$0x1, %1, %0|%0, %1, 0x1}"; - else - return "vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}"; -} + "vextract%I1\t{$0x1, %1, %0|%0, %1, 0x1}" [(set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -11672,9 +11652,9 @@ (define_insn "avx_vbroadcastf128_" (match_dup 1)))] "TARGET_AVX" "@ - vbroadcastf128\t{%1, %0|%0, %1} - vinsertf128\t{$1, %1, %0, %0|%0, %0, %1, 1} - vperm2f128\t{$0, %t1, %t1, %0|%0, %t1, %t1, 0}" + vbroadcast%I0\t{%1, %0|%0, %1} + vinsert%I0\t{$1, %1, %0, %0|%0, %0, %1, 1} + vperm2%I0\t{$0, %t1, %t1, %0|%0, %t1, %t1, 0}" [(set_attr "type" "ssemov,sselog1,sselog1") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "0,1,1") @@ -11873,7 +11853,7 @@ (define_insn "*avx_vperm2f128_full (match_operand:SI 3 "const_0_to_255_operand" "n")] UNSPEC_VPERMIL2F128))] "TARGET_AVX" - "vperm2f128\t{%3, %2, %1, %0|%0, %1, %2, %3}" + "vperm2%I0\t{%3, %2, %1, %0|%0, %1, %2, %3}" [(set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -11893,7 +11873,7 @@ (define_insn "*avx_vperm2f128_noze { int mask = avx_vperm2f128_parallel (operands[3], mode) - 1; operands[3] = GEN_INT (mask); - return "vperm2f128\t{%3, %2, %1, %0|%0, %1, %2, %3}"; + return "vperm2%I0\t{%3, %2, %1, %0|%0, %1, %2, %3}"; } [(set_attr "type" "sselog") (set_attr "prefix_extra" "1") @@ -11964,7 +11944,7 @@ (define_insn "vec_set_lo_" (match_operand:VI8F_256 1 "register_operand" "x") (parallel [(const_int 2) (const_int 3)]))))] "TARGET_AVX" - "vinsertf128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}" + "vinsert%I0\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}" [(set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -11979,7 +11959,7 @@ (define_insn "vec_set_hi_" (parallel [(const_int 0) (const_int 1)])) (match_operand: 2 "nonimmediate_operand" "xm")))] "TARGET_AVX" - "vinsertf128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}" + "vinsert%I0\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}" [(set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -11995,7 +11975,7 @@ (define_insn "vec_set_lo_" (parallel [(const_int 4) (const_int 5) (const_int 6) (const_int 7)]))))] "TARGET_AVX" - "vinsertf128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}" + "vinsert%I0\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}" [(set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -12011,7 +11991,7 @@ (define_insn "vec_set_hi_" (const_int 2) (const_int 3)])) (match_operand: 2 "nonimmediate_operand" "xm")))] "TARGET_AVX" - "vinsertf128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}" + "vinsert%I0\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}" [(set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -12029,7 +12009,7 @@ (define_insn "vec_set_lo_v16hi" (const_int 12) (const_int 13) (const_int 14) (const_int 15)]))))] "TARGET_AVX" - "vinsertf128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}" + "vinsert%I0\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}" [(set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -12047,7 +12027,7 @@ (define_insn "vec_set_hi_v16hi" (const_int 6) (const_int 7)])) (match_operand:V8HI 2 "nonimmediate_operand" "xm")))] "TARGET_AVX" - "vinsertf128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}" + "vinsert%I0\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}" [(set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -12069,7 +12049,7 @@ (define_insn "vec_set_lo_v32qi" (const_int 28) (const_int 29) (const_int 30) (const_int 31)]))))] "TARGET_AVX" - "vinsertf128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}" + "vinsert%I0\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}" [(set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -12091,7 +12071,7 @@ (define_insn "vec_set_hi_v32qi" (const_int 14) (const_int 15)])) (match_operand:V16QI 2 "nonimmediate_operand" "xm")))] "TARGET_AVX" - "vinsertf128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}" + "vinsert%I0\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}" [(set_attr "type" "sselog") (set_attr "prefix_extra" "1") (set_attr "length_immediate" "1") @@ -12477,7 +12457,7 @@ (define_insn "*vec_concat_avx" switch (which_alternative) { case 0: - return "vinsertf128\t{$0x1, %2, %t1, %0|%0, %t1, %2, 0x1}"; + return "vinsert%I0\t{$0x1, %2, %t1, %0|%0, %t1, %2, 0x1}"; case 1: switch (get_attr_mode (insn)) {