| Message ID | 20190827064033.28973-17-peng.fan@nxp.com |
|---|---|
| State | Accepted |
| Commit | dbb2b7e50899ea6651bdc4c931427e6152493ba2 |
| Delegated to: | Stefano Babic |
| Headers | show
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| Series |
i.MX8MM support
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expand
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diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index dd393b581b..261f586fc0 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -55,6 +55,8 @@ void enable_tzc380(void) /* Enable TZASC and lock setting */ setbits_le32(&gpr->gpr[10], GPR_TZASC_EN); setbits_le32(&gpr->gpr[10], GPR_TZASC_EN_LOCK); + if (IS_ENABLED(CONFIG_IMX8MM)) + setbits_le32(&gpr->gpr[10], BIT(1)); } void set_wdog_reset(struct wdog_regs *wdog)
set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to generated AXI bus errors with TZC380 enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com> --- arch/arm/mach-imx/imx8m/soc.c | 2 ++ 1 file changed, 2 insertions(+)