@@ -11,4 +11,16 @@
# include <asm/arch-rockchip/cru_rk3399.h>
#endif
+/* CRU_GLB_RST_ST */
+enum {
+ GLB_POR_RST,
+ FST_GLB_RST_ST = BIT(0),
+ SND_GLB_RST_ST = BIT(1),
+ FST_GLB_TSADC_RST_ST = BIT(2),
+ SND_GLB_TSADC_RST_ST = BIT(3),
+ FST_GLB_WDT_RST_ST = BIT(4),
+ SND_GLB_WDT_RST_ST = BIT(5),
+ GLB_RST_ST_MASK = GENMASK(5, 0),
+};
+
#endif /* _ROCKCHIP_CLOCK_H */
@@ -5,10 +5,53 @@
*/
#include <common.h>
+#include <asm/io.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/arch-rockchip/cru.h>
+#include <asm/arch-rockchip/hardware.h>
+#include <linux/err.h>
+
+static char *get_reset_cause(void)
+{
+ struct rockchip_cru *cru = rockchip_get_cru();
+ char *cause = NULL;
+
+ if (IS_ERR(cru))
+ return cause;
+
+ switch (cru->glb_rst_st) {
+ case GLB_POR_RST:
+ cause = "POR";
+ break;
+ case FST_GLB_RST_ST:
+ case SND_GLB_RST_ST:
+ cause = "RST";
+ break;
+ case FST_GLB_TSADC_RST_ST:
+ case SND_GLB_TSADC_RST_ST:
+ cause = "THERMAL";
+ break;
+ case FST_GLB_WDT_RST_ST:
+ case SND_GLB_WDT_RST_ST:
+ cause = "WDOG";
+ break;
+ default:
+ cause = "unknown reset";
+ }
+
+ /*
+ * Clear glb_rst_st, so we can determine the last reset cause
+ * for following resets.
+ */
+ rk_clrreg(&cru->glb_rst_st, GLB_RST_ST_MASK);
+
+ return cause;
+}
int print_cpuinfo(void)
{
printf("SoC: Rockchip %s\n", CONFIG_SYS_SOC);
+ printf("Reset cause: %s\n", get_reset_cause());
/* TODO print operating temparature and clock */
Add reset cause for rk3399 in common cpu-info file. This would help to print the reset cause for various resets. Common code for various rockchip reset cause will add it in future. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- arch/arm/include/asm/arch-rockchip/cru.h | 12 +++++++ arch/arm/mach-rockchip/cpu-info.c | 43 ++++++++++++++++++++++++ 2 files changed, 55 insertions(+)