@@ -2000,38 +2000,38 @@ static const MemoryRegionOps gic_ops[2] = {
{
.read_with_attrs = gic_dist_read,
.write_with_attrs = gic_dist_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
},
{
.read_with_attrs = gic_thiscpu_read,
.write_with_attrs = gic_thiscpu_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
}
};
static const MemoryRegionOps gic_cpu_ops = {
.read_with_attrs = gic_do_cpu_read,
.write_with_attrs = gic_do_cpu_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
static const MemoryRegionOps gic_virt_ops[2] = {
{
.read_with_attrs = gic_thiscpu_hyp_read,
.write_with_attrs = gic_thiscpu_hyp_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
},
{
.read_with_attrs = gic_thisvcpu_read,
.write_with_attrs = gic_thisvcpu_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
}
};
static const MemoryRegionOps gic_viface_ops = {
.read_with_attrs = gic_do_hyp_read,
.write_with_attrs = gic_do_hyp_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
static void arm_gic_realize(DeviceState *dev, Error **errp)
@@ -352,12 +352,12 @@ static const MemoryRegionOps gic_ops[] = {
{
.read_with_attrs = gicv3_dist_read,
.write_with_attrs = gicv3_dist_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
},
{
.read_with_attrs = gicv3_redist_read,
.write_with_attrs = gicv3_redist_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
}
};
@@ -96,7 +96,7 @@ static MemTxResult gicv3_its_trans_write(void *opaque, hwaddr offset,
static const MemoryRegionOps gicv3_its_trans_ops = {
.read_with_attrs = gicv3_its_trans_read,
.write_with_attrs = gicv3_its_trans_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
void gicv3_its_init_mmio(GICv3ITSState *s, const MemoryRegionOps *ops)
@@ -112,7 +112,7 @@ static void pic_write(void *opaque, hwaddr addr,
static const MemoryRegionOps pic_ops = {
.read = pic_read,
.write = pic_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
.valid = {
.min_access_size = 4,
.max_access_size = 4
@@ -310,7 +310,7 @@ static void imx_avic_write(void *opaque, hwaddr offset,
static const MemoryRegionOps imx_avic_ops = {
.read = imx_avic_read,
.write = imx_avic_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
static void imx_avic_reset(DeviceState *dev)
@@ -65,7 +65,7 @@ static void imx_gpcv2_write(void *opaque, hwaddr offset,
static const struct MemoryRegionOps imx_gpcv2_ops = {
.read = imx_gpcv2_read,
.write = imx_gpcv2_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
.impl = {
/*
* Our device would not work correctly if the guest was doing
@@ -222,7 +222,7 @@ static void pl190_write(void *opaque, hwaddr offset,
static const MemoryRegionOps pl190_ops = {
.read = pl190_read,
.write = pl190_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
static void pl190_reset(DeviceState *d)
@@ -101,7 +101,7 @@ static const MemoryRegionOps puv3_intc_ops = {
.min_access_size = 4,
.max_access_size = 4,
},
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
static void puv3_intc_realize(DeviceState *dev, Error **errp)
@@ -136,7 +136,7 @@ static void slavio_intctl_mem_writel(void *opaque, hwaddr addr,
static const MemoryRegionOps slavio_intctl_mem_ops = {
.read = slavio_intctl_mem_readl,
.write = slavio_intctl_mem_writel,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_BIG_ENDIAN,
.valid = {
.min_access_size = 4,
.max_access_size = 4,
@@ -206,7 +206,7 @@ static void slavio_intctlm_mem_writel(void *opaque, hwaddr addr,
static const MemoryRegionOps slavio_intctlm_mem_ops = {
.read = slavio_intctlm_mem_readl,
.write = slavio_intctlm_mem_writel,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_BIG_ENDIAN,
.valid = {
.min_access_size = 4,
.max_access_size = 4,
For each device declared with DEVICE_NATIVE_ENDIAN, find the set of targets from the set of target/hw/*/device.o. If the set of targets are all little or all big endian, re-declare as DEVICE_LITTLE_ENDIAN or DEVICE_BIG_ENDIAN respectively. Then, on inspection: - if not used, re-declare as DEVICE_HOST_ENDIAN. - if max/min size=1, re-declare as DEVICE_HOST_ENDIAN. - if just a bit bucket, re-declare as DEVICE_HOST_ENDIAN - if PCI, re-declare as DEVICE_LITTLE_ENDIAN. - if for {ARM|unicore32} only, re-declare as DEVICE_LITTLE_ENDIAN. - if for SPARC only, re-declare as DEVICE_BIG_ENDIAN. Signed-off-by: Tony Nguyen <tony.nguyen@bt.com> --- hw/intc/arm_gic.c | 12 ++++++------ hw/intc/arm_gicv3.c | 4 ++-- hw/intc/arm_gicv3_its_common.c | 2 +- hw/intc/etraxfs_pic.c | 2 +- hw/intc/imx_avic.c | 2 +- hw/intc/imx_gpcv2.c | 2 +- hw/intc/pl190.c | 2 +- hw/intc/puv3_intc.c | 2 +- hw/intc/slavio_intctl.c | 4 ++-- 9 files changed, 16 insertions(+), 16 deletions(-)