| Message ID | 20190826132553.4116-7-hch@lst.de (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | [1/6] unicore32: remove the unused pgprot_dmacoherent define | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | warning | Failed to apply on branch next (0e4523c0b4f64eaf7abe59e143e6bdf8f972acff) |
| snowpatch_ozlabs/apply_patch | fail | Failed to apply to any branch |
Hi Christoph, On Mon, Aug 26, 2019 at 03:25:53PM +0200, Christoph Hellwig wrote: > Based on an email from Paul Burton, quoting section 4.8 "Cacheability and > Coherency Attributes and Access Types" of "MIPS Architecture Volume 1: > Introduction to the MIPS32 Architecture" (MD00080, revision 6.01). > > Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Paul Burton <paul.burton@mips.com> Thanks, Paul > --- > arch/mips/Kconfig | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > index fc88f68ea1ee..aff1cadeea43 100644 > --- a/arch/mips/Kconfig > +++ b/arch/mips/Kconfig > @@ -1119,6 +1119,13 @@ config DMA_PERDEV_COHERENT > > config DMA_NONCOHERENT > bool > + # > + # MIPS allows mixing "slightly different" Cacheability and Coherency > + # Attribute bits. It is believed that the uncached access through > + # KSEG1 and the implementation specific "uncached accelerated" used > + # by pgprot_writcombine can be mixed, and the latter sometimes provides > + # significant advantages. > + # > select ARCH_HAS_DMA_WRITE_COMBINE > select ARCH_HAS_SYNC_DMA_FOR_DEVICE > select ARCH_HAS_UNCACHED_SEGMENT > -- > 2.20.1 >
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index fc88f68ea1ee..aff1cadeea43 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1119,6 +1119,13 @@ config DMA_PERDEV_COHERENT config DMA_NONCOHERENT bool + # + # MIPS allows mixing "slightly different" Cacheability and Coherency + # Attribute bits. It is believed that the uncached access through + # KSEG1 and the implementation specific "uncached accelerated" used + # by pgprot_writcombine can be mixed, and the latter sometimes provides + # significant advantages. + # select ARCH_HAS_DMA_WRITE_COMBINE select ARCH_HAS_SYNC_DMA_FOR_DEVICE select ARCH_HAS_UNCACHED_SEGMENT
Based on an email from Paul Burton, quoting section 4.8 "Cacheability and Coherency Attributes and Access Types" of "MIPS Architecture Volume 1: Introduction to the MIPS32 Architecture" (MD00080, revision 6.01). Signed-off-by: Christoph Hellwig <hch@lst.de> --- arch/mips/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+)